P.K. Ko

Hot-electron-induced MOSFET degradation—Model, monitor, and improvement

Evidence suggests that MOSFET degradation is due to interface-states generation by electrons having 3.7 eV and higher energies. This critical energy and the observed time dependence is explained with physical model involving the breaking of the ≡ Si<inf>s</inf>H bonds. The device lifetime τ is proportional to<tex>I_{sub}^{-2.9}I_{d}^{1.9}\Delta V_{t}^{1.5}</tex>. If I<inf>sub</inf>is large because of small<tex>L</tex>or large V<inf>d</inf>, etc., τ will be small. I<inf>sub</inf>(and possibly light emission) is thus a powerful predictor of τ. The proportionality constant has been found to vary by a factor of 100 for different technologies, offering hope for substantially better reliability through future improvements in dielectric /interface technologies. A simple physical model can relate the channel field E<inf>m</inf>to all the device parameters and bias voltages. Its use in interpreting and guiding hot-electron scaling are described. LDD structures can reduce E<inf>m</inf>and I<inf>sub</inf>and, when properly designed, reduce device degradation.

A unified model for the flicker noise in metal-oxide-semiconductor field-effect transistors

A unified flicker noise model which incorporates both the number fluctuation and the correlated surface mobility fluctuation mechanism is discussed. The latter is attributed to the Coulombic scattering effect of the fluctuating oxide charge. The model has a functional form resembling that of the number fluctuation theory, but at certain bias conditions it may reduce to a form compatible with Hooges empirical expression. The model can unify the noise data reported in the literature, without making any ad hoc assumption on the noise generation mechanism. Specifically, the model can predict the right magnitude and bias dependence of the empirical Hooge parameter. Simulated flicker noise characteristics obtained with a circuit-simulation-oriented flicker noise model based on the new formulation were compared with experimental noise data. Excellent agreement between the calculations and measurement was observed in both the linear and saturation regions for MOS transistors fabricated by different technologies. The work shows that the flicker noise in MOS transistors can be completely explained by the trap charge fluctuation mechanism, which produces mobile carrier number fluctuation and correlated surface mobility fluctuation. >

BSIM: Berkeley short-channel IGFET model for MOS transistors

The Berkeley short-channel IGFET model (BSIM), an accurate and computationally efficient MOS transistor model, and its associated characterization facility for advanced integrated-circuit design are described. Both the strong-inversion and weak-inversion components of the drain current expression are included. In order to speed up the circuit-simulation execution time, the dependence of the drain current on the substrate bias has been modeled with a numerical approximation. This approximation also simplifies the transistor terminal-charge expressions. The charge model was derived from its drain-current counterpart to preserve consistency of device physics. Charge conservation is guaranteed in this model.

Hot-Electron-Induced MOSFET Degradation - Model, Monitor, and Improvement

Evidence suggests that MOSFET degradation is due to interface-states generation by electrons having 3.7 eV and higher energies. This critical energy and the observed time dependence is explained with a physical model involving the breaking of the = Si/sub s/H bonds. The device lifetime /spl tau/ is proportional to...

Lucky-electron model of channel hot-electron injection in MOSFET'S

The lucky-electron concept is successfully applied to the modeling of channel hot-electron injection in n-channel MOSFETs, although the result can be interpreted in terms of electron temperature as well. This results in a relatively simple expression that can quantitatively predict channel hot-electron injection current in MOSFETs. The model is compared with measurements on a series of n-channel MOSFETs and good agreement is achieved. In the process, new values for many physical parameters such as hot-electron scattering mean-free-path, impact-ionization energy are determined. Of perhaps even greater practical significance is the quantitative correlation between the gate current and the substrate current that this model suggests.

The impact of gate-induced drain leakage current on MOSFET scaling

Significant gate-induced drain leakage current can be detected in thin gate oxide MOSFETs at drain voltages much lower than the junction breakdown voltage. This current is found to be due to the band-to-band tunneling occurring in the deep-depletion layer in the gate-to-drain overlap region. In order to limit the leakage current to 0.1pA/µm, the oxide field in the gate-to-drain overlap region must be limited to 1.9MV/cm. This may set another constraint for the power supply voltage and/or oxide thickness in VLSI MOSFET scaling Device design considerations for minimizing the gate-induced drain leakage current are discussed.

A dynamic threshold voltage MOSFET (DTMOS) for ultra-low voltage operation

To extend the lower bound of power supply to ultra-low voltages (0.6 V and below), we propose a dynamic-threshold voltage MOSFET (DTMOS) built on silicon-on-insulator (SOI). The threshold voltage of DTMOS drops as the gate voltage is raised, resulting in a much higher current drive than standard MOSFET at low power supply voltages. On the other hand, V/sub t/ is high at V/sub gs/=0, therefore the leakage current is low. We provide experimental results and 2-D device and mixed-mode simulations to analyze DTMOS and compare its performance with a standard MOSFET. These results verify excellent DC inverter characteristics down to V/sub dd/=0.2 V, and good ring oscillator performance down to 0.3 V for DTMOS.<<ETX>>

The effect of high fields on MOS device and circuit performance

A simple analytical model for the MOS device characteristics including the effect of high vertical and horizontal fields on channel carrier velocity is presented. Analytical expressions for the drain current, saturation drain voltage, and transconductance are developed. These expressions are used to examine the effect of scaling the channel length, the gate dielectric thickness, and the bias voltage on device characteristics. Experimental results from various geometry MOS devices are used to verify the trends predicted by the model. Using the physical understanding provided by the model, we examine the effect of device geometry scaling on circuit performance. We suggest that for gate capacitance-limited circuits one should reduce the channel length, and for parasitic capacitance-limited circuits one should reduce the gate dielectric thickness to improve circuit performance.

Random telegraph noise of deep-submicrometer MOSFETs

The random telegraph noise exhibited by deep-submicrometer MOSFETs with very small channel area (<or=1 mu m/sup 2/) at room temperature is studied. Analysis of the amplitude of the current fluctuations reveals that the trapped charges generate noise through modulation of the carrier mobility in addition to the carrier number. Parameters needed for modeling the carrier mobility fluctuation effect on the flicker noise in conventional MOSFETs are extracted directly from the random telegraph noise data.<<ETX>>

A physics-based MOSFET noise model for circuit simulators

Discussed is a physics-based MOSFET noise model that can accurately predict the noise characteristics over the linear, saturation, and subthreshold operating regions but which is simple enough to be implemented in any general-purpose circuit simulator. Expressions for the flicker noise power are derived on the basis of a theory that incorporates both the oxide-trap-induced carrier number and correlated surface mobility fluctuation mechanisms. The model is applicable to long-channel, as well as submicron n- and p-channel MOSFETs fabricated by different technologies, and all the model parameters can be easily extracted from routine I-V and noise measurements. >