Paul M. Harvey

A method to measure impedance of chip/package/board power supply system using pseudo-impulse current

A method to measure the impedance Z(f) of a chip/package/board power supply system using pseudo-impulse current is described. This method can be easily applied to the digital systems with synchronous clocking systems. A PowerPC based microprocessor power supply system is used as an example to show the effectiveness of the method

Distributed On-chip Power Supply Noise Characterization of the Cell Broadband Engine

Noise characterization of the 65 nm multicore Cell Broadband Enginetrade (Cell/B.E.)* processor was performed using highly configurable workloads and selective stimulation of identical cores to study noise distribution throughout the chip. On-chip power supply noise propagation velocity and attenuation were found to be influenced by chip/package resonance in the power distribution system. Hypothesis for this phenomenon is proposed.

Power supply noise simulation considering dynamic effect of on-chip current

This paper describes a technique to analyze the dependence of on-chip switching current on power supply voltage and temperature, and how to implement that in power supply noise simulations. It is shown that this on-chip dynamic effect can introduce significant damping to the otherwise passive chip/package/board power supply network

Simulation of worst case switching noise on a DDR2 interface

This paper describes a new technique to simulate worst case simultaneous switching noise on a DDR2 interface. The paper focuses on how the impedance response of the power distribution network can be used in determining an excitation pattern that results in the worst case switching noise on the interface.