Peter Leunissen

Spectral analysis of line width roughness and its application to immersion lithography

Various approaches can be used to quantify line width rough- ness LWR. One of the most commonly used estimators of LWR is standard deviation . However, a substantial amount of information is ignored if only is measured. We use an automated approach to inves- tigate LWR, where standard deviation, correlation length, and power spectrum are measured online on critical dimension scanning electron microscopes. This methodology is used to monitor LWR, investigate the effect of LWR on critical dimension precision, and to benchmark new resists for immersion lithography. Our results indicate that online LWR metrology is a critical tool in a variety of applications, including but not restricted to process control.

Novel seed layer formation using direct electroless copper deposition on ALD-Ru layer for high aspect ratio TSV

High aspect ratio through-Si vias (2 μmφ, AR 15) have been filled without voids on coupon scale by using an electroless deposited Cu seed layer on ALD-Ru. The total Cu overburden, which is ELD and filling Cu, was about 700 nm. In addition, the electroless Cu bath showed good stability during 2 hours with controlling pH to stabilize the deposition process. These results show the feasibility of electroless deposition in TSV processing.

Particle Removal Efficiency and Damage Analysis on Silicon Wafers after Megasonic Cleaning in Solvents

The increasing complexity of semiconductor devices imposes challenging requirements on particle contamination and surface damage. To meet these requirements novel surface-cleaning processes are evaluated, which combine physical energy with organic solvents. In this work, the performance of megasonic cleaning with deionized water (DIW) and N-methylpyrrolidone (NMP) was evaluated in terms of particle removal efficiency (PRE) and damage analysis. The goal was to define an optimum process window where the PRE was maximum and the damage was minimum. Particle removal and damage analysis were performed on unpatterned silicon wafers and with patterned polysilicon lines, respectively, under identical sonic power and process parameters. A comparison between these two solvents reveals that at low sonic power the particle-cleaning performances in DIW and NMP are similar. At high sonic power, in both solvents a detailed analysis of the PRE and damage indicates a non-homogeneous trend over the surface of the wafer. More particularly, in DIW higher PRE and damage are noticed towards the edge of the wafer. In NMP, the opposite trend was observed. However, an equivalent performance was obtained at a lower sonic power in case of NMP compared to DIW. Further understanding of megasonic cleaning in solvents, and an optimization of the process parameters are the key to improve the performance of megasonic cleaning in organic solvents like NMP.

Low temperature through-Si via fabrication using electroless deposition

All-wet fabrication process using electroless deposition of barrier and Cu seed layers has been achieved for a high aspect ratio through-Si via (TSV). Formation of thin barrier metal layer of NiB and CoB is possible by the use of nano particles catalyst which is densely adsorbed on SiO2 of TSV sidewall. Silane coupling agent with 3-aminopropyl-triethoxysilane is effective for enhancement of adsorption density of nanoparticles. Conformal electroless Cu layer is deposited on the barrier layer without catalyst by displacement plating. The adhesion strength between electroless barrier layer and SiO2 substrate is strengthened by annealing. These results strongly suggest a possibility of the all-wet process for high aspect ratio TSV.