Peter Vanbekbergen

Basic Gate Implementation of Speed-Independendent Circuits

Existing methods for synthesis of speedindependent circuits under unbounded delay model have difficulties in combining the generality of formal approach with the practicality of the implementation architectures used at the logic level. This paper presents a characteristic property of the state graph specification, called Monotonous Cover requirement, implying its hazard-free implementation within the standard structure of a two-level SOP logic and a row of latches. The overall synthesis procedure ensures satisfiability of this condition by applying the generalised state assignment approach.

The impact of CAD on the design of low power digital circuits

The power consumption and dissipation of electronic systems is linked to many elements such as display devices, disk drives and even fans; however, the focus of this paper is on the electronic sub-system and specifically the power dissipation of integrated circuits. This paper will first briefly motivate the topical concerns about power consumption and dissipation in integrated circuits and will then outline the automated techniques that are currently being developed to reduce power consumption.

A Design and Validation System for Asynchronous Circuits

In this paper we present a completemethodology for the design and validation of asynchronous circuits starting from a formal specificationmodel that roughly correspondsto a timing diagram. The methodology is presented in such a way that it is easy to embed in the current methodology for synchronous circuits. The different steps of the synthesis process will just be briefly touched upon. The main part of the paper concentrates on the simulation and validation of asynchronous circuits. It discusses where the designer needs validation and how it can be done. It also explains how this process can be automated and embedded in the complete methodology.