Peter Wennekers

Fully Integrated SiGe-BiCMOS Receiver(RX) and Transmitter(TX) Chips for 76.5 GHz FMCW Automotive Radar Systems Including Demonstrator Board Design

Advancements in SiGe device development enable the realization of 76.5 GHz FMCW automotive long range radar systems using relatively low-cost silicon technology. This paper presents fully integrated receiver (RX) and transmitter (TX) circuits for wide temperature range operations. The TX chips consists of a VCO with two stage power amplifier, frequency divider chain, power detector circuit and operational amplifier to on-chip compensate the temperature drift of the center frequency. The RX chips is based on a 38.25 GHz doubler, a 76.5 GHz LNA, a passive balun, a fully balanced mixer and IF buffer. Also the integration and combination with planar patched antennas on a demonstrator board was discussed.

SiGe 77GHz Automotive Radar Technology

Recent advancements in SiGe device development enable the realization of 77GHz automotive long range radar systems using relatively low-cost silicon technology. This paper will discuss technology requirements for the radar design and present examples of receiver and transmitter circuit implementations.

An Integrated SiGe-BiCMOS Low Noise Transmitter Chip with a Frequency Divider Chain for 77 GHz Applications

This paper presents a low noise transmitter chip for a 77 GHz FMCW radar system being comprised of push-pull voltage controlled oscillator with an output buffer, a frequency divider chain and a peak-to-peak detector. The measurements show an output power of approximately 11 dBm at each of the two differential 50 Omega loads over a wide tuning range. The measured phase noise is about -85 dBc/Hz at 100 KHz offset frequency. The circuit has been implemented in a Freescale Semiconductor 0.18 mum SiGe-BiCMOS technology. SiGe-HBTs with a typical ft/fmax of 200GHz/205GHz are used as active devices

A cascade 3-1-1 multibit /spl Sigma//spl Delta/ A/D modulator with reduced sensitivity to non-idealities

A new 3(5b)-1(1b)-1(5b) fifth-order cascade multibit MA A/D modulator is proposed to achieve high dynamic range at low oversampling ratio of 8. The /spl Sigma//spl Delta/ modulator in the first stage accomplishes a modified 3rd-order FIR noise-transfer-function, which is stable by using a 5-bit quantizer. Moreover, low-distortion topology in this stage is employed to reduce the nonlinear effects of operational amplifiers. The second and third stages consist of the common first-order architecture with 1-bit and 5-bit quantizer, respectively. The performance of the proposed modulator is analyzed and compared with other topologies. Simulation results show that the in-band noise, especially at high frequencies, can be significantly suppressed by these arrangements and this architecture has also very low sensitivity to nonidealities of analog circuits. It is very suitable for high-resolution broadband applications, as well as for low-power design in scaled IC technologies.