Piotr Szotkowski

Application of symbolic functional decomposition concept in FSM implementation targeting FPGA devices

This paper presents an FSM implementation method based on symbolic functional decomposition. This novel approach in multilevel logic synthesis of finite state machines targets FPGA architectures. Traditional methods are based on two steps: internal state encoding and then mapping the encoded state transition table into target architecture. In the case of FPGAs, functional decomposition is recognized as the most efficient method of implementing digital circuits. However none of the known state encoding algorithms can be considered as a good method to be used with functional decomposition. In this paper the concept of symbolic functional decomposition is applied to obtain a multilevel structure that is suitable for implementing in FPGA logic cells. The symbolic decomposition does not require separate encoding step. It accepts FSM description with symbolic states and performs decomposition introducing such a state encoding that guarantees the best solution known.

Symbolic Functional Decomposition Algorithm for FSM Implementation

This paper presents an algorithm of symbolic functional decomposition for the implementation of finite state machines in field programmable gate array (FPGA) circuits. Unlike previous approaches to this problem, which consist of separate encoding and mapping steps, this algorithm does not pre-encode the machines states; instead, the states are encoded gradually during every step of the functional decomposition process (used for mapping the FSM to the FPGA circuits LUT cells). This approach guarantees high quality of the final decomposition, with better results than the ones obtained by pre-encoding the FSMs states.

MULTILEVEL SYNTHESIS OF FINITE STATE MACHINES BASED ON SYMBOLIC FUNCTIONAL DECOMPOSITION

This paper presents a Finite State Machine (FSM) implementation method based on symbolic functional decomposition. This novel approach to multilevel logic synthesis of FSMs targets Field Programmable Gate Array (FPGA) architectures. Traditional methods consist of two steps: internal state encoding and then mapping the encoded state transition table into target architecture. In the case of FPGAs, functional decomposition is recognized as the most efficient method of implementing digital circuits. However, none of the known state encoding algorithms can be considered as a good method to be used with functional decomposition. In this paper, the concept of symbolic functional decomposition is applied to obtain a multilevel structure that is suitable for implementation in FPGA architectures. The symbolic functional decomposition does not require a separate encoding step. It accepts FSM description with symbolic states and performs decomposition, producing such a state encoding that guarantees the optimal or near-optimal solution.

Virtualization Devices for Prototyping of Future Internet

In this paper we present three virtualization devices (Xen server, NetFPGA and EZ appliance) which have been used for implementation of data plane functionality in a Future Internet architecture, the IIP System. We give general description of these devices and present implementation of the IIP System node on each device.

A graph-based symbolic functional decomposition algorithm for FSM implementation

Currently widespread approaches to implementation of finite state machines in Field Programmable Gate Array circuits consist of separate encoding and mapping steps. This paper presents a graph-based algorithm that implements a symbolic functional decomposition of the FSMs - a method that does not pre-encode the machinepsilas states, but instead encodes them gradually during every step of the functional decomposition process (used for mapping the FSM to the FPGA circuitpsilas LUT cells). The symbolic functional decomposition method guarantees high quality of the final decomposition, with better results than the current two-step approaches.

Using Symbolic Functional Decomposition to Implement FSMs in Heterogenous FPGAs

This paper presents initial results of applying symbolic functional decomposition method to implementation of finite state machines in heterogenous FPGA structures. The results obtained with a prototypical academic tool art decomp are compared to traditional approaches, which use separate encoding and mapping steps.

Efficient Functional Decomposition Algorithm Based on Indexed Partition Calculus

This paper presents an efficient functional decomposition method based on the indexed partition calculus. The computational efficiency of indexed partition manipulation procedures allows performing multilevel logic synthesis for multi-output, not fully specified Boolean functions of large number of input variables. The presented results prove that the proposed approach can generate results of high quality.

Reversible logic synthesis of boolean functions using functional decomposition

Reversible logic circuits are one of the solutions to the problem of conventional microelectronic technology reaching its limits. Unfortunately, efficient reversible system design requires different approaches than conventional solutions; the current methods of reversible function synthesis have certain limitations, including their complexity and scalability. This paper presents the application of functional decomposition, developed for conventional logic synthesis, as a potentially crucial step in synthesis of reversible logic. A decomposition of a Boolean function into a network of smaller sub-functions, subsequently synthesized into reversible blocks and composed into a reversible system, often yields better results than direct reversible synthesis of the original Boolean function. The experimental results presented in this paper demonstrate the potential of the proposed approach.

Reversible synthesis of incompletely specified Boolean functions using functional decomposition

Conventional microelectronic technology reaches its limits, and reversible logic circuits might address at least one of the problems: unwanted energy dissipation. Unfortunately, current methods of reversible function synthesis have certain limitations, including suboptimal handling of incompletely specified Boolean functions and yielding circuit sizes (and costs) that can be vastly improved upon. This paper presents the application of functional decomposition as a crucial step in synthesis of reversible logic that cost-efficiently implements incompletely specified Boolean functions. A decomposition of an incompletely specified Boolean function into a network of smaller sub-functions, subsequently synthesized into reversible blocks and composed into a reversible system, yields significantly better results than direct reversible synthesis of the original, incompletely specified Boolean function. The experimental results presented in this paper demonstrate the potential of the proposed approach.

Decomposition-Based Methods for FSM Implementation

Designing a complex digital system requires an effective method for modeling the sequential part of the system. One of the methods is the Finite State Machine based modeling. The implementation efficiency of the sequential part of the designed system has usually a great impact on the processing performance of the whole digital system. Petri nets, which are another method of modeling the sequential part of systems, can also be transformed into FSM-based models. Thus, development of effective synthesis methods for FSM implementation is very important. Digital systems are often implemented in FPGA architectures. Because of their specific structure, the most efficient synthesis methods are based on functional decomposition. This chapter discusses decomposition-based methods for FSM implementation targeting programmable structures.