R. Yarema

Vertically Integrated Circuits at Fermilab

The exploration of vertically integrated circuits, also commonly known as 3D-IC technology, for applications in radiation detection started at Fermilab in 2006. This paper examines the opportunities that vertical integration offers by looking at various 3D designs that have been completed by Fermilab. The emphasis is on opportunities that are presented by through silicon vias (TSV), wafer and circuit thinning, and finally fusion bonding techniques to replace conventional bump bonding. Early work by Fermilab has led to an international consortium for the development of 3D-IC circuits for High Energy Physics. For the first time, Fermilab has organized a 3D MPW run, to which more than 25 different designs have been submitted by the consortium.

Development of a pixel readout chip for BTeV

A description is given of the R&D program underway at Fermilab to develop a pixel readout ASIC appropriate for use at the Tevatron collider. Results are presentetd frOm tests performed on the first prototype pixel readout chip deigned at Fermilab, and a new readout architecture is described.

The CDF SVX: A silicon vertex detector for a hadron collider

Abstract A silicon microstrip vertex detector is being constructed as an upgrade to the CDF detector at the Fermilab Tevatron-1 p p collider. This device, which is designed to operate in the hadron collider environment, should allow the tagging of long-lived heavy flavors produced in p p collisions. The mechanical and electronic design of this device are described in this paper.

Design and Construction of the CDF Central Tracking Chamber

Abstract We describe the design and construction of a large drift chamber of a novel design well adapted for operation in high magnetic fields and in the high track density environment of hadron colliders.

FPIX2: A radiation-hard pixel readout chip for BTeV

A radiation-hard pixel readout chip, FPIX2, is being developed at Fermilab for the recently approved BTeV experiment. Although designed for BTeV, this chip should also be appropriate for use by CDF and DZero. A short review of this development effort is presented. Particular attention is given to the circuit redesign which was made necessary by the decision to implement FPIX2 using a standard deep-submicron CMOS process rather than an explicitly radiation-hard CMOS technology, as originally planned. The results of initial tests of prototype 0.25{micro} CMOS devices are presented, as are plans for the balance of the development effort.

A Cerium Glass Fiber-Optic Active Target for High Energy Physics Experiments

A fiber-optic plate imaging system has been developed for active target and tracking applications, in which the active element is Ce(3+) in a silicate glass. Particle tracks and interactions have been recorded with a hit density of ¿ 4/mm for minimum ionizing particles and with a spatial resolution ¿ ~ 28¿ m.

Design and Tests of the Vertically Integrated Photon Imaging Chip

The Vertically Integrated Photon Imaging Chip (VIPIC) project explores opportunities of the three-dimensional integration for imaging of X-rays. The design details of the VIPIC1 chip are presented and are followed by results of testing of the chip. The VIPIC1 chip was designed in a 130 nm process, in which through silicon vias are embedded right after the front-end-of-line processing. The integration of tiers is achieved by the Cu-Cu thermo-compression or Cu-based oxide-oxide bonding. The VIPIC1 readout integrated circuit was designed for high timing resolution, pixel based, X-ray Photon Correlation Spectroscopy experiments typically using 8 keV X-rays at a synchrotron radiation facility. The design was done for bonding a Silicon pixel detector, however other materials can be serviced as long as the positive polarity of charge currents is respected.

The SVX4 integrated circuit

Abstract A first prototype of the SVX4 readout IC with enclosed transistor layout for radiation tolerance has been fabricated in a commercial 0.25 μm bulk CMOS process. The SVX4 is intended to instrument the CDF and D0 Run IIB silicon strip detector upgrades at Fermilab. The design and test results are discussed.

Design and prototyping of the front end readout system for the CDF silicon vertex detector

A silicon microstrip vertex detector is under construction for the collider detector at Fermilab (CDF). The vertex detector, which contains close to 4000 individual strips, will be read out with the full-custom VLSI circuit, the SVX chip, developed for this application. The integration of this circuit into a full front-end readout system is described. Problems of noise, packaging, signal and power distribution, control and readout, testing, and quality control are discussed. Results are presented on the operation of a prototype system including silicon strips. >

A Four Quadrant Magnet Power Supply for Superconducting and Conventional Accelerator Applications

Modern conventional and superconducting accelerators often require bipolar power supplies capable of operating with high precision from zero to full output. An SCR type power supply comprised of two SCR bridges and operating with circulating current does an excellent job of satisfying this difficult requirement. Power supplies of this type are often called fourquadrant or dual converter power supplies with circulating current. The basic principles and design considerations of this converter are discussed with particular emphasis on the advantages of the converter. Application of the dual converter to high precision bipolar magnet current control within the Fermilab Saver/Doubler project is presented.