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Dive into the research topics where Rainer Giedigkeit is active.

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Featured researches published by Rainer Giedigkeit.


international conference on advanced thermal processing of semiconductors | 2010

Impact of dual beam laser spike annealing parameters on nickel silicide formation characteristics

Jeffrey Mileham; Van Le; Shrinivas Shetty; Jeff Hebb; Yun Wang; Dave Owen; Robert Binder; Rainer Giedigkeit; Stephan Waidmann; Inka Richter; Kornelia Dittmar; Hartmut Prinz; Martin Weisheit

Nickel silicide is a common contact material for current generation microelectronic devices. As the technology nodes become smaller, forming the NiSi phase with milli-second or below annealing is an attractive alternative to conventional RTA annealing because of the potential for increased device performance and yield. This paper will discuss the use of a dual beam laser spike annealing (LSA) to form nickel silicide on silicon wafers in the microsecond regime. A detailed evaluation of anneal times (400µs and 800µs) and anneal exposure (100% and 50% stitching, or single and double anneals) was done on 300mm wafers with NiPtSix film (post-RTA1 anneal/100Å). Analytical testing by sheet resistance, CGS, XRD, AES depth profile, AFM, SEM, and ellipsometry was performed on the wafers to examine the effects of anneal times and exposure on phase transition and/or film morphology. A study of the nickel silicide transition curve by sheet resistance vs. temperature shows that there is a higher NiSi damage threshold temperature for single anneal as compared to double anneal. For uniformly annealed full wafers processed at temperatures slightly below the damage threshold, the results confirm: 1) NiSi was formed with negligible or small differences in film structure and, 2) the 100% stitching single annealed wafers show similar process performance in terms of sheet resistance and within wafer uniformity to the 50% stitching double annealed wafers at both 400 and 800µs.


international conference on advanced thermal processing of semiconductors | 2010

Characterization of nickel silicide transition behavior using non-contact CGS metrology

David M. Owen; Jeff Hebb; Shrinivas Shetty; Yun Wang; Van Le; Robert Binder; Rainer Giedigkeit; Stephan Waidmann; Inka Richter; Kornelia Dittmar; Hartmut Prinz; Martin Weisheit

Advanced millisecond annealing technologies are being implemented to enable scaling of silicidation of Ni for contacts. There are several aspects of the millisecond annealing process that must be optimized in order to minimize defects and improve yield. One critical aspect is that NiSi agglomeration must be suppressed at higher annealing temperatures. Typically, the onset of agglomeration can be detected by microscopic observation, phase analysis or electrical measurement. This paper describes an alternate approach using the Coherent Gradient Sensing (CGS) interferometer to provide a fast, non-contact method for quickly identifying the nickel silicide agglomeration threshold. Wafers with blanket Ni films were annealing using laser spike annealing (LSA) at various temperatures. The CGS technique is demonstrated to be sensitive to changes in surface morphology associated with the nickel silicide phase transitions and agglomeration and the results correlate to more conventional metrology approaches.


Archive | 2009

Multiple gate transistor having homogenously silicided fin end portions

Sven Beyer; Patrick Press; Rainer Giedigkeit; Jan Hoentschel


Archive | 2010

Semiconductor Device Comprising Contact Elements and Metal Silicide Regions Formed in a Common Process Sequence

Kai Frohberg; Rainer Giedigkeit; Robert Binder; Stephan Waidmann


Archive | 2011

MOSFET INTEGRATED CIRCUIT WITH IMPROVED SILICIDE THICKNESS UNIFORMITY AND METHODS FOR ITS MANUFACTURE

Clemens Fitz; Stephan Waidmann; Stefan Flachowsky; Peter Baars; Rainer Giedigkeit


Archive | 2010

Halbleiterbauelement mit Kontaktelementen und Metallsilizidgebieten, die in einer gemeinsamen Prozesssequenz hergestellt sind

Robert Binder; Kai Frohberg; Rainer Giedigkeit; Stephan Waidmann


Archive | 2010

Test Structure for Controlling the Incorporation of Semiconductor Alloys in Transistors Comprising High-K Metal Gate Electrode Structures

Stephan Kronholz; Maciej Wiatr; Rainer Giedigkeit


Archive | 2011

Verringerung der mechanischen Verspannung in Metallstapel komplexer Halbleiterbauelemente während der Chip-Substrat-Lötung mittels eines verbesserten Abkühlschemas

Michael Grillberger; Matthias Lehr; Rainer Giedigkeit


Archive | 2011

Reduction of Mechanical Stress in Metal Stacks of Sophisticated Semiconductor Devices During Die-Substrate Soldering by an Enhanced Cool Down Regime

Michael Grillberger; Matthias Lehr; Rainer Giedigkeit


Archive | 2012

Teststruktur zum Steuern des Einbaus von Halbleiterlegierungen in Transistoren, die Metallgateelektrodenstrukturen mit großem Σ aufweisen

Stephan Kronholz; Maciej Wiatr; Rainer Giedigkeit

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