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Dive into the research topics where Richard Ruzicka is active.

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Featured researches published by Richard Ruzicka.


international on line testing symposium | 2008

Physical Demonstration of Polymorphic Self-Checking Circuits

Richard Ruzicka; Lukas Sekanina; Roman Prokop

Polymorphic gates can be considered as a new reconfigurable technology capable of integrating logic functions with sensing in a single compact structure. Polymorphic gates whose logic function can be controlled by the level of the power supply voltage (Vdd) represent a special class of polymorphic gates. A new polymorphic NAND/NOR gate controlled by Vdd is presented. This gate was fabricated and utilized in a self-checking polymorphic adder. This paper presents an experimental evaluation of this novel implementation.


2009 IEEE Workshop on Evolvable and Adaptive Hardware | 2009

REPOMO32 - New reconfigurable polymorphic integrated circuit for adaptive hardware

Lukas Sekanina; Richard Ruzicka; Zdenek Vasicek; Roman Prokop; Lukas Fujcik

In this paper, a new reconfigurable polymorphic chip (REPOMO32) is introduced. This chip has been developed in order to investigate the electrical properties of polymorphic circuits and demonstrate the applications of polymorphic electronics. REPOMO32 contains an array of 32 configurable logic elements; each of them can perform the AND, OR, XOR and polymorphic NAND/NOR function which is controlled by the level of the power supply voltage. REPOMO32 parameters are reported together with the analysis of polymorphic circuits implemented and evolved in REPOMO32. Potential applications of the chip are also discussed.


adaptive hardware and systems | 2009

Polymorphic FIR Filters with Backup Mode Enabling Power Savings

Lukas Sekanina; Richard Ruzicka; Zbysek Gajda

A polymorphic FIR filter is proposed which can operate in two modes. The first mode is considered as a standard mode in which the filter performs a normal operation. In the second mode, the filter operates with reduced power supply voltage (Vdd), some filter coefficients are reconfigured (as response to the change of the polymorphic gates function which is controlled by Vdd) and some parts of the filter are disconnected. Experimental results indicate that while power consumption can significantly be reduced when half of the taps is suspended the filter is still able to achieve a reasonable quality of filtering.


digital systems design | 2010

Gracefully Degrading Circuit Controllers Based on Polytronics

Richard Ruzicka

This paper proposes utilisation of polymorphic electronics to design digital circuit controllers that gracefully degrades when some inconvenient situation arise, e.g. when battery goes low or a chip temperature cross some safe level. In proposed approach, the next state logic of the controller is designed using polymorphic gates. Polymorphic gates exhibit two or more logic functions in according to a specific condition (e.g. Vdd level or special signals). This allows to make a smart reconfiguration of the circuit. An algorithm for designing gracefully degrading circuit controllers using polymorphic gates is proposed in the paper. Purpose of the algorithm is demonstrated on an example of a controller. This controller was physically realised and its functionality (especially in transient state) was verified.


international test conference | 2013

Implementing A Unique Chip Id On A Reconfigurable Polymorphic Circuit

Lukas Sekanina; Richard Ruzicka; Zdenek Vasicek; Vaclav Simek; Petr Hanacek

A unique unclonable chip ID has been implemented using various platforms in the recent years. In this paper, we investigate the use of polymorphic gates as a new mechanism for implementing a unique chip ID in systems already containing some polymorphic gates. The proposed solution exploits the fact that switching time of polymorphic gates (controlled by V dd ) is slightly different even for neighboring gates on the same die because of fabrication variations. We applied a partial reconfiguration in order to generate 48-bit IDs on the reconfigurable polymorphic REPOMO32 chip that we have developed in our previous research. We achieved 94.44% stable bits which is reasonably close to existing approaches. DOI: http://dx.doi.org/10.5755/j01.itc.42.1.925


digital systems design | 2011

Chip Temperature Selfregulation for Digital Circuits Using Polymorphic Electronics Principles

Richard Ruzicka; Vaclav Simek

The paper presents a new design approach to digital circuits that provides for an increased chip operation reliability from temperature point of view. The key aspect behind the proposed method of approach is to avoid chip overheating due to special design and subsequent integration of dedicated circuit controller. Such element is blended seamlessly with the surrounding circuitry and posses the ability to reconfigure itself when the temperature of the chip goes beyond defined temperature boundary. After the end of reconfiguration phase, the controller ensures only indispensable function. By this arrangement, the power and heat dissipation of the circuit is reduced until the chip temperature falls again under certain level. When the chip is cooled down appropriately, the controller returns back to normal operating mode automatically. The proposed approach utilises principles of polymorphic digital circuits which embrace smart and fast reconfiguration, compact and cost-effective design with embedded sensors, where the aim is to ensure overall system stability and in the same time increase its dependability.


design and diagnostics of electronic circuits and systems | 2010

On analysis of fabricated polymorphic circuits

Vaclav Simek; Richard Ruzicka; Lukas Sekanina

The paper describes a reconfigurable polymorphic chip REPOMO32, experiments carried out with this chip and provides report on important experiences with regard to practical applications of digital polymorphic circuits sensitive to the power supply voltage (Vdd). REPOMO32 contains array of 32 configurable logic elements which can perform polymorphic NAND/NOR function controlled by the level of the Vdd. Moreover, it can be declared as the first fabricated chip of this kind which basically allows the user to design more complex circuits than only a few gates.


digital systems design | 2009

Dependable Controller Design Using Polymorphic Counters

Richard Ruzicka

This paper proposes utilisation of polymorphic electronics to design dependable digital circuit controllers. The controller of a general digital circuit is an implementation of a finite state machine. One of most popular implementation is based on a synchronous digital counter. The counter consists of flip-flops and some glue logic. In proposed approach, the glue logic is designed using polymorphic gates. Polymorphic gates exhibit two or more logic functions in according to a specific condition (e.g. Vdd level or special signals). This allows to make a smart reconfiguration of the circuit designed using polymorphic gates. The controller based on this approach can be then reconfigured very easily and by this, it can respond to (potentially inconvenient) environment circumstances.


international conference on design and technology of integrated systems in nanoscale era | 2016

Lets move polymorphism downwards: On the multifunctional logic based on ambipolar behaviour of semiconductor devices

Richard Ruzicka; Radek Tesar

One of main advantages of polymorphic (multifunctional) electronics is efficiency in terms of size. To fulfil size-oriented constraints of a circuit, which exhibits more than one function with the same (unchanged) structure, components of the circuit have to be multi-functional and these components must be defined at the lowest possible level. Lower level means more size-efficient solution. This paper shows how components for polymorphic circuits should be implemented more efficiently, if multi-functionality at the transistor level (based on ambipolarity, often observed in so called post-silicon devices) is employed instead of at the gate level of abstraction, as it was used yet.


design and diagnostics of electronic circuits and systems | 2011

Behavior of CMOS polymorphic circuits in high temperature environment

Richard Ruzicka; Vaclav Simek; Lukas Sekanina

The paper describes a series of experiments performed with the aim to analyze the fundamental impact of high temperatures on behavior of polymorphic digital circuits. These experiments were conducted using a reconfigurable polymorphic chip REPOMO32 which is configured (in addition to the configuration bit stream) using the level of power supply voltage (Vdd). Experiments show that polymorphic gates in the chip can be easily involved (in terms of functionality) not only by Vdd, but also by temperature. Because experiments also prove that the physical design of the REPOMO32 chip is robust enough to keep the functionality of all circuitry of the REPOMO32 and its dynamic parameters are stable enough under wide range of operating temperature, the chip can also be used for future designs of digital polymorphic circuits controlled by temperature.

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Vaclav Simek

Brno University of Technology

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Lukas Sekanina

Brno University of Technology

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Adam Crha

Brno University of Technology

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Jan Nevoral

Brno University of Technology

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Michal Reznicek

Brno University of Technology

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Radek Tesar

Brno University of Technology

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Roman Prokop

Brno University of Technology

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Zdenek Vasicek

Brno University of Technology

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Jaroslav Jankovsky

Brno University of Technology

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Josef Strnadel

Brno University of Technology

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