Network


Latest external collaboration on country level. Dive into details by clicking on the dots.

Hotspot


Dive into the research topics where Robert F. Walker is active.

Publication


Featured researches published by Robert F. Walker.


international symposium on physical design | 2005

Technology migration technique for designs with strong RET-driven layout restrictions

Xin Yuan; Kevin W. McCullen; Fook-Luen Heng; Robert F. Walker; Jason D. Hibbeler; Robert J. Allen; Rani Narayan

Restrictive design rules (RDRs) have been introduced as a simplified layout optimization method to better enable resolution enhancement techniques in ultra-deep submicron designs (16). In this paper, we study the technology migration problem for designs with strong RET-driven layout restrictions, i.e., RDR constraints, which require devices (gates) to be placed on a coarse pitch and in a single orientation. In particular, we study the legalization problem with on-pitch constraints for devices with an objective of minimum layout perturbation. The problem can be formulated as an integer linear programming (ILP) problem with a set of stringent integer constraints, and it can be approximated as a mixed integer linear programming (MILP) problem. Instead of using an MILP solver to solve it, we propose a two-stage method --- first the target on-pitch positions for gates are computed and second the original problem is relaxed to a linear programming problem. Library cell layouts designed in a technology with conventional ground rules have been migrated successfully to a technology with RDRs using our approach.


Archive | 2006

MINIMUM LAYOUT PERTURBATION-BASED ARTWORK LEGALIZATION WITH GRID CONSTRAINTS FOR HIERARCHICAL DESIGNS

Robert J. Allen; Michael S. Gray; Fook-Luen Heng; Jason D. Hibbeler; Kevin W. McCullen; Rani Narayan; Robert F. Walker; Xin Yuan


Archive | 2007

TECHNOLOGY MIGRATION FOR INTEGRATED CIRCUITS WITH RADICAL DESIGN RESTRICTIONS

Robert J. Allen; Cam V. Endicott; Fook-Luen Heng; Jason D. Hibbeler; Kevin W. McCullen; Rani Narayan; Robert F. Walker; Xin Yuan


Archive | 2006

IC Layout Optimization to Improve Yield

Robert J. Allen; Faye D. Baker; Albert M. Chu; Michael S. Gray; Jason D. Hibbeler; Daniel N. Maynard; Mervyn Y. Tan; Robert F. Walker


Archive | 2008

Integrated circuit selective scaling

Fook-Luen Heng; Jason D. Hibbeler; Kevin W. McCullen; Rani Narayan; Stephen Larry Runyon; Robert F. Walker


Archive | 2004

INTEGRATED CIRCUIT YIELD ENHANCEMENT USING VORONOI DIAGRAMS

Robert J. Allen; Michael S. Gray; Jason D. Hibbeler; Mervyn Y. Tan; Robert F. Walker


Archive | 2004

Method and system for obtaining a feasible integer solution from a half-integer solution in hierarchical circuit layout optimization

Michael S. Gray; Jason D. Hibbeler; Gustavo E. Tellez; Robert F. Walker


Archive | 2003

Circuit area minimization using scaling

Michael S. Gray; Kevin W. McCullen; Gustavo E. Tellez; Robert F. Walker


Archive | 2011

Schematic-based layout migration

Geoffrey R. Barrows; Derick G. Behrends; William James Craig; Michael S. Gray; Matthew T. Guzowski; Kevin W. McCullen; Rani Narayan; Robert F. Walker


Archive | 2006

Method, apparatus and computer program product for optimizing an integrated circuit layout

Jason D. Hibbeler; Rani Narayan; Robert F. Walker

Researchain Logo
Decentralizing Knowledge