Robert M. Rassel

A BiCMOS Technology Featuring a 300/330 GHz (fT/fmax) SiGe HBT for Millimeter Wave Applications

The paper presents a 0.13 mum SiGe BiCMOS technology for millimeter wave applications. This technology features a high performance HBT (fT = 300 GHz /fmax = 330 GHz) along with various newly developed millimeter wave features, such varactor, Schottky and p-i-n diodes and other back end of line passives

Schottky Barrier Diodes for Millimeter Wave SiGe BiCMOS Applications

For the first time, a high performance, low leakage Schottky barrier diode (SBD) with cutoff frequency above 1.0 THz in a 130nm SiGe BiCMOS technology for millimeter-wave application is described. Device optimization has been evaluated by varying critical process and layout parameters such as, anode size, cathode depth, cathode resistivity, junction tailoring, and guardring optimization is investigated

Silicon Schottky Diode Power Converters Beyond 100 GHz

This paper presents circuits based on Schottky barrier diodes (SBDs) in IBMs 0.13-mum SiGe BiCMOS process. Circuits such as sub-harmonic up-conversion mixers and frequency doublers are demonstrated at frequencies beyond 100 GHz on silicon. These circuits enable power generation at millimeter wave frequencies on silicon. The frequency doublers can deliver >0 dBm output power at 110 GHz and the 2X sub-harmonic up converters exhibit peak conversion loss of <3 dB up to 120 GHz.

High performance, low complexity 0.18 /spl mu/m SiGe BiCMOS technology for wireless circuit applications

High frequency performance at low current density and low wafer cost is essential for low power wireless BiCMOS technologies. We have developed a low-complexity, ASIC-compatible, 0.18 /spl mu/m SiGe BiCMOS technology for wireless applications that offers 3 different breakdown voltage NPNs; with the high performance device achieving F/sub t//F/sub max/ of 60/85 GHz with a 3.0 V BV/sub CEO/. In addition, a full suite of high performance passive devices complement the state-of-the-art SiGe wireless HBTs.

A low complexity 0.13 /spl mu/ SiGe BiCMOS technology for wireless and mixed signal applications

We present IBMs next-generation, cost-performance-optimized BiCMOS technology (BiCMOS 8WL) which combines a state-of-the-art suite of SiGe NPNs, foundry compatible 0.13 μm CMOS, and a rich set of modular passive devices. Intended for a wide variety of supply voltages, the technology, features three different performance NPNs and standard, dual oxide, zero V t , and junction isolated FETs. Optimized for wireless and mixed signal applications, BiCMOS 8WL will enable system on a chip integration for 3G cellular applications.

SiGe BiCMOS Trends - Today and Tomorrow

High performance communications applications have made technology choices more important than ever. Silicon germanium (SiGe) BiCMOS has enabled the widespread introduction of many these applications by providing superior cost and integration capability, compared to III-V solutions and, relative to RFCMOS, one can attain better time to market. BiCMOS integration approaches for high performance and cost performance NPN modules and state of the art passive elements are discussed as well as future technology directions

A high-resistivity SiGe BiCMOS technology for WiFi RF front-end-IC solutions

We present for the first time a novel high resistivity bulk SiGe BiCMOS technology that has been optimized for a WiFi RF front-end-IC (FEIC) integration. A nominally 1000 Ohm-cm p-type silicon substrate is utilized to integrate several SiGe HBTs for power amplifiers (PAs), a SiGe HBT low-noise amplifier (LNA), and isolated nFET RF switch device. Process elements include trench isolation for low-loss passives and reduced parasitic coupling, and a lower-resistivity region for the FETs to minimize changes to the circuit library.

High-resistivity SiGe BiCMOS technology development

IBM first qualified a 0.35μm generation 1000 Ω-cm high resistivity substrate (HiRES) SiGe BiCMOS technology in 2011. This technology was optimized for WiFi and cellular NPN power amplifier (PA), NPN low noise amplifier (LNA), and isolated CMOS NFET switch rf front-end-IC (FEIC) integration. It includes an optional through silicon via used as a low inductance ground path for NPN emitters. Data for 50 Ω-cm, 1st generation HiRES, and 2nd generation HiRES NPN PA, LNA, and CMOS NFET switch devices are reviewed.

A cost-competitive high performance Junction-FET (JFET) in CMOS process for RF & analog applications

in this paper, we present a cost-effective JFET integrated in 0.18µm RFCMOS process. The design is highly compatible with standard CMOS process, therefore can be easily scaled and implemented in advanced technology nodes. The design impact on Ron and Voff is further discussed, providing the insights and guidelines for JFET optimization. Besides the superior flicker noise (1/f noise) characteristics, this JFET device also demonstrates promising RF characteristics such as maximum frequency, linearity, power handling capability, power-added efficiency, indicating a good candidate for RF designs.

High and low density complimentary MIM capacitors fabricated simultaneously in advanced RFCMOS and BiCMOS technologies

Two MIM capacitors with capacitance density of 11 and 0.48 fF/um2 were fabricated simultaneously using IBM-s 0.13 um SiGe 8 WL BiCMOS process. Results from DC parametric measurement indicate that these two capacitors compliment each other extremely well.