Robert Steinhoff

Avalanche-induced thermal instability in Ldmos transistors

Safe operating area limits for large Ldmos are shown to be due to a thermal instability mechanism initiated by avalanche generated carriers which turn-on the parasitic bipolar transistor. An analytic model is described and is shown to agree well with experimental data.

Formation and suppression of a newly discovered secondary EOS event in HBM test systems

A previously undetected trailing pulse from HBM testers was found to create unexpected gate oxide failures on new technologies. This secondary pulse, which is EOS in nature, is caused by the discharge relay and the parasitics of the charge circuit. This paper investigates this critical phenomenon and establishes the tester improvements to safely suppress the trailing pulse effects.

25V ESD NPN Transistor Optimized by Distributed Emitter Ballasting using Emitter Contact Area Segmentation

A 25 V ESD NPN transistor is made high current capable by means of distributed emitter ballasting. The proposed segmentation of the emitter contact area along the width offers an efficient way to extend the homogeneous current regime without causing any significant increase of the holding voltage. At high current, a second snap-back is observed in the TLP current-voltage characteristics. Transient interferometric mapping analyses show that this voltage drop is due to current filamentation arising at a time decreasing with increasing current amplitude

ESD robust integrated output device for smart power ICs

An integrated lateral output device is presented which has a very high degree of ESD robustness. The high ESD robustness is achieved with negligible increase in the overall size of the output device. Such an integrated device is ideally suited for high voltage output pins requiring low on-state resistance (Rdson) with stringent system level IEC requirements.

Using two-dimensional filament modeling to predict Ldmos and Scrldmos behavior under high current ESD conditions

A novel 2D-simulation method is used to simulate major aspects of the formation of the current filament and to help understand and predict the level of ESD robustness in lateral power devices.