Ronald J. Syzdek

Embedded split-gate flash memory with silicon nanocrystals for 90nm and beyond

We present a split-gate based NOR flash memory array with silicon nanocrystals as the storage medium. 128 KB memory arrays have been evaluated with this technology and the results presented here show a nanocrystal memory that has been demonstrated to achieve a minimum 1.5 V operating window that is maintained through 10 K program/erase cycles; well controlled array threshold distributions; fast source-side injection programming (10-20 us); fast tunnel erase into the gate; and robust high temperature data retention for both uncycled and cycled arrays. Results presented here with focus on the array operation demonstrate the maturity of this technology for implementation into consumer, industrial, and automotive microcontrollers.

High Performance Nanocrystal Based Embedded Flash Microcontrollers with Exceptional Endurance and Nanocrystal Scaling Capability

In this paper, we present the first-ever commercially available embedded Microcontrollers built on 90nm-node with silicon nanocrystal memories that has intrinsic capability of exceeding 500K program/erase cycles. We also show that the cycling performance across temperature (-40C to 125C) is very well behaved even while maintaining high performance that meets or exceeds the requirements of consumer, industrial, and automotive markets. In specific EEPROM implementation, such high endurance is capable of delivering in excess of 200M data updates. In addition, we also demonstrate that the nanocrystal flash memory is highly scalable to the next generation nodes and the scaling can be accomplished without degradation of pro-gram/erase speed, endurance and reliability.

16Mb Split Gate Flash Memory with Improved Process Window

This paper reports on recent bitcell optimizations that improve drive current and program performance. The 16 Mb and 32 Mb array results are best to-date for nanocrystal memories and suggest a robust, reliable array operation.

Modeling and verification of industrial flash memories

We present a method to abstract, formalize, and verify industrial flash memory implementations. Flash memories contain specialized transistors, e.g., floating gate and split gate devices, which preclude the use of traditional switch-level abstractions for their verification. We circumvent this problem through behavioral abstractions, which allow formalization of the behaviors of the design as interacting state machines. Behavioral abstractions are agnostic to transistor type, making them suitable for formalizing flash memories. We have verified industrial flash memory implementations based on both floating gate and split gate technologies. Our work provides the first formal functional verification results for industrial flash memories.