Ryo Kishida

Physical-based RTN modeling of ring oscillators in 40-nm SiON and 28-nm HKMG by bimodal defect-centric behaviors

We apply the bimodal trap model of Random Telegraph Noise (RTN) to predict its impact on the circuit level instead of the conventional unimodal trap model. Two different trap distributions represented by the average number of traps N and the average impact to threshold voltage Vth per trap η in gate dielectric make measured RTN distributions of ring oscillators (ROs) to follow the bimodal trap model. It replicates distributions of frequency fluctuation of ROs caused by RTN on 40-nm SION and 28-nm HKMG processes. RO with standard size-transistors can be modeled by scaled parameters from RO with minimum-size transistors.

Negative bias temperature instability caused by plasma induced damage in 65 nm bulk and Silicon on thin BOX (SOTB) processes

Reliability degradation caused by plasma induced damage (PID) has become a significant concern with the miniaturization of electronic devices. In this paper, we investigate negative bias temperature instability (NBTI) caused by PID measuring frequencies of ring oscillators with an antenna on a single stage. We fabricated a chip in 65 nm bulk and Silicon On Thin BOX (SOTB) processes. Degradation rates of NBTI are equivalent among antenna structures in the antenna ratio (AR) of 5k and 500. NBTI is accelerated by PID in AR of 50k. NBTI degradation caused by PID is equivalent in the bulk and SOTB. SOTB also prevents PID by connecting an antenna to a drain as same as the bulk.

Correlation between BTI-induced degradations and process variations by measuring frequency of ROs

We analyze the correlation between BTI (Bias Temperature Instability)-induced degradations and process variations. BTI shows a strong effect on highly scaled LSIs in the same way as the process variations. It is necessary to predict the combinational effects. We should analyze both aging-degradations and process variations of MOSFETs to explain the correlation. We measure initial frequencies and the aging-degradations of ROs (ring oscillators) of 65-nm process test circuits. The initial frequencies of ROs follow gaussian distributions. The degradations can be approximated by logarithmic function of stress time. The degradation at the “fast” condition of the variations has a higher impact on the frequency than the “slow” one. The correlation coefficient is 0.338. In this case, we can reduce the design margin for BTI-induced degradations because the degradation at the “slow” conditon on the variations is smaller than the average.

Initial and Long-Term Frequency Degradation on Ring Oscillators from Plasma Induced Damage in 65 nm Bulk and Silicon On Thin BOX processes

Degradation of reliability caused by plasma induced damage (PID) has become a significant concern with miniaturizing a device size. In this paper, we measure frequencies of ring oscillators with an antenna structure on a single stage. In bulk, PID is relieved by connecting an antenna to a drain because electric charge flow to a substrate. The difference of initial frequencies is 0.79 % between structures which cause and relieve PID. A Silicon On Thin BOX (SOTB) which has a buried oxide of less than 10 nm also relieves PID. Initial frequencies are affected by PID but there is no effect of PID in a long-term degradation mainly caused by bias temperature instability (BTI).

Circuit-level simulation methodology for Random Telegraph Noise by using Verilog-AMS

As device sizes are downscaled to nanometer, Random Telegraph Noise (RTN) becomes dominant. It is indespensable to accurately estimate the effect of RTN. We propose the RTN simulation method for analog circuits. It is based on the charge trapping model. We replicate the RTN-induced threshold voltage fluctuation to attach a variable DC voltage source to the gate of MOSFET by using Verilog-AMS. We confirm that drain current of MOSFETs temporally fluctuates. The fluctuations of RTN are different for each MOSFET. Our proposed method can be applied to estimate the temporal impact of RTN including multiple transistors. We can successfully replicate RTN-induced frequency fluctuations in 3-stage ring oscillators as similar as the measurement results.

Degradation caused by Negative Bias temperature instability depending on Body Bias on NMOS or PMOS in 65 nm bulk and thin-BOX FDSOI processes

Reverse Body Bias (RBB) control on Fully Depleted Silicon On Insulator (FDSOI) with thin Buried OXide (BOX) layer mitigates power consumption on the standby mode. However, Degradation caused by Negative Bias Temperature Instability (NBTI) is changed by RBB. We measure aging degradation of ring oscillators by applying RBB to NMOS or PMOS. In bulk, RBB to PMOS suppresses NBTI-induced degradation because increasing threshold voltage reduces carriers in channel. However, RBB to NMOS does not suppress NBTI-induced degradation because Positive BTI (PBTI) is not dominant in NMOS. In FDSOI, RBB to not only PMOS but also NMOS suppresses NBTI-induced degradation because BOX layer intercepts carriers to flow to substrate.

Correlations between plasma induced damage and negative bias temperature instability in 65 nm bulk and thin-BOX FDSOI processes

We evaluate Plasma Induced Damage (PID) and Negative Bias Temperature Instability (NBTI) by measuring frequency of Ring Oscillators (ROs). Initial frequency degradation by PID from Antenna Ratio (AR) of 500 to 1k are 2.1% and 1.9% in the bulk and thin-BOX FDSOI, respectively. NBTI is accelerated by PID in less than 500 AR which is the upper limit of the antenna rule. NBTI correlates with PID and also with initial frequency. The correlation coefficient (CC) between NBTI-induced degradations and the initial frequency is 0.68 in FDSOI, while there is few correlation in bulk (CC = 0.24) because random dopant fluctuation is dominant.

Initial and long-term frequency degradation of ring oscillators caused by plasma-induced damage in 65 nm bulk and fully depleted silicon-on-insulator processes

The degradation of reliability caused by plasma-induced damage (PID) has become a significant concern with the miniaturization of device size. In particular, it is difficult to relieve PID in silicon-on-insulator (SOI) because it contains buried oxide (BOX) layers. In this work, we compare PID between a bulk and a silicon on thin BOX (SOTB), which has BOX layers of less than 10 nm. We measure frequencies of ring oscillators with an antenna structure on a single stage. In the bulk, PID is relieved by first connecting an antenna to a drain because electric charge flows to a substrate. The difference in initial frequency is 0.79% between structures, which cause and relieve PID. SOTB also relieves the same amount of PID. Initial frequencies are affected by PID, but there is no effect of PID on the long-term degradation mainly caused by bias temperature instability (BTI).