S. Jallepalli
Motorola
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Featured researches published by S. Jallepalli.
IEEE Transactions on Electron Devices | 1996
S.A. Hareland; S. Krishnamurthy; S. Jallepalli; Choh-Fei Yeap; K. Hasnat; A. Tasch; C.M. Maziar
Successful scaling of MOS device feature size requires thinner gate oxides and higher levels of channel doping in order to simultaneously satisfy the need for high drive currents and minimal short-channel effects. However, in deep submicron (/spl les/0.25 /spl mu/m gate length) technology, the combination of the extremely thin gate oxides (t/sub ox//spl les/10 nm) and high channel doping levels (/spl ges/10/sup 17/ cm/sup -3/) results in transverse electric fields at the Si/SiO/sub 2/ interface that are sufficiently large, even near threshold, to quantize electron motion perpendicular to the interface. This phenomenon is well known and begins to have an observable impact on room temperature deep submicron MOS device performance when compared to the traditional classical predictions which do not take into account these quantum mechanical effects. Thus, for accurate and efficient device simulations, these effects must be properly accounted for in todays widely used moment-based device simulators. This paper describes the development and implementation into PISCES of a new computationally efficient three-subband model that predicts both the quantum mechanical effects in electron inversion layers and the electron distribution within the inversion layer. In addition, a model recently proposed by van Dort et al. (1994) has been implemented in PISCES. By comparison with self-consistent calculations and previously published experimental data, these two different approaches for modeling the electron inversion layer quantization are shown to be adequate in order to both accurately and efficiently simulate many of the effects of quantization on the electrical characteristics of N-channel MOS transistors.
Solid-state Electronics | 1998
W.-K. Shih; Everett X. Wang; S. Jallepalli; Francisco A. Leon; C.M. Maziar; Al F. Tasch
Abstract For the first time, the tunneling current in silicon nMOS structures with ultra-thin gate oxides has been studied both by numerically solving Schrodingers equation and by using the WKB approximation, which explicitly includes the size quantization effects in the inversion layers. The numerical solution employs first-order perturbation within the one-band effective-mass approximation to calculate the lifetime of an inversion-layer quasi-bound state. The good agreement in the tunneling currents estimated with these two methods justifies the use of the WKB approximation in the direct tunneling regime. The range of validity of the WKB approximation is also discussed.
IEEE Transactions on Electron Devices | 1997
K. Hasnat; Choh-Fei Yeap; S. Jallepalli; S.A. Hareland; W.-K. Shih; V.M. Agostinelli; A. Tasch; C.M. Maziar
A thermionic emission model based on a non-Maxwellian electron energy distribution function for the electron gate current in NMOSFETs is described. The model uses hydrodynamic equations to describe more correctly the electron transport and gate injection phenomena in submicron devices. A generalized analytical function is used to describe the high-energy tail of the electron energy distribution function. Coefficients of this generalized function are determined by comparing simulated gate currents with the experimental data. This model also includes the self-consistent calculation of the tunneling component of the gate current by using the WKB approximation, and by using a more accurate representation of the oxide barrier by including the image potential. Good agreement with gate currents over a wide range of bias conditions for three different technological sets of devices are demonstrated by using a single set of coefficients.
IEEE Transactions on Electron Devices | 1998
S.A. Hareland; M. Manassian; W.-K. Shih; S. Jallepalli; Haihong Wang; G. Chindalore; A. Tasch; C.M. Maziar
In this paper, models appropriate for device simulators are developed which account for the quantum mechanical nature of accumulated regions. Accumulation layer quantization is important in deep submicron (/spl les/0.25 /spl mu/m) MOS devices in the overlapped source/drain extension regions, in accumulation mode SOI devices, and in buried-channel PMOS structures. Computationally efficient models suitable for routine device simulation are presented that predict the reduction of the accumulated net electron (hole) sheet charge when quantization of the electron (hole) accumulation region is accounted for. The results of comparisons with self-consistent simulations support the validity of these models. In addition, simulation results will be shown which illustrate that when inversion layer quantum mechanical effects are modeled, it is also necessary to account for accumulation layer quantum mechanical effects in order to obtain more physically accurate as well as numerically stable solutions.
IEEE Transactions on Electron Devices | 1998
S.A. Hareland; S. Jallepalli; W.-K. Shih; Haihong Wang; G. Chindalore; A. Tasch; C.M. Maziar
As MOS devices have been successfully scaled to smaller feature sizes, thinner gate oxides and higher levels of channel doping have been used in order to simultaneously satisfy the need for high drive currents and minimal short-channel effects. With the onset and development of deep submicron (/spl les/0.25 /spl mu/m gate length) technology, the combination of the extremely thin gate oxides (t/sub ox//spl les/10 nm) and high channel doping levels (/spl ges/10/sup 17/ cm/sup -3/) results in transverse electric fields at the Si/SiO/sub 2/ interface that are sufficiently large, even near threshold, to quantize the motion of inversion layer carriers near the interface. The effects of quantization are well known and begin to impact the electrical characteristics of the deep submicron devices at room temperature when compared to the traditional classical predictions which do not take into account these quantum mechanical (QM) effects. For accurate device simulations, quantization effects must be properly accounted for in todays widely used moment-based device simulators. This paper describes a new computationally efficient three-subband model that predicts the effects of quantization on the terminal characteristics in addition to the spatial distribution of holes within the inversion layer. The predictions of this newly developed model agree very well with both the predictions of a self-consistent Schrodinger-Poisson solver and experimental measurements of QM effects in MOS devices.
IEEE Transactions on Electron Devices | 1997
S.A. Hareland; S. Jallepalli; G. Chindalore; W.-K. Shih; A. Tasch; C.M. Maziur
The effects of quantization of the inversion layer of MOSFET devices is an area of increasing importance as technology is aggressively scaled below 0.25 /spl mu/m. Although electron inversion layers have attracted considerable interest, very little work has been reported for holes. This paper describes the implementation and results of a simple, computationally efficient model, appropriate for device simulators, for predicting the effects of hole inversion layer quantization. This model compares very favorably with experimental results and the predictions of a full-band, self-consistent Schrodinger-Poisson solver.
IEEE Transactions on Electron Devices | 2000
G. Chindalore; W.-K. Shih; S. Jallepalli; S.A. Hareland; A.F. Tasch; C.M. Maziar
This work presents for the first time experimental results for the extraction of the increase in the effective electrical oxide thickness (/spl Delta/t/sub ox/=t/sub ox,expt/-t/sub ox,physical/) in MOS accumulation layers with heavily doped substrates due to quantum mechanical (QM) effects, using experimentally measured MOS capacitance-voltage (C-V) characteristics and experimentally verified fullband self-consistent calculations. In addition, the fullband self-consistent simulations have been extended to accumulation regions, and the experimental results for the accumulation region have been compared with simulations. It has been shown that at moderate to high doping levels, /spl Delta/t/sub ox/ is as much as 0.4 to 0.5 nm for both electrons and holes, whereas for very high doping levels (>1/spl times/10/sup 19/ cm/sup -3/) /spl Delta/t/sub ox/ approaches zero. Thus, the experimental accumulation capacitance is predicted sufficiently well by the classical analysis itself.
Vlsi Design | 1998
W.-K. Shih; S. Jallepalli; Mahbub Rashed; C.M. Maziar; A. Tasch
Non-local electron transport in nMOSFET inversion layers has been studied by Monte Carlo (MC) simulations. Inversion layer quantization has been explicitly included in the calculation of density of states and scattering rate for low-energy electrons while bulk band structure is used to describe the transport of more energetic electrons. For uniform, high-lateral field conditions, the effects of quantization are less pronounced due to the depopulation of electrons in the lower-lying subbands. On the other hand, Monte Carlo results for carrier transport in spatially varying lateral fields (such as those in the inversion layer of MOSFETs) clearly indicate that depopulation of the low-lying subbands is less evident in the non-local transport regime. Quasi-2D simulations have shown that, at high transverse effective field, the inclusion of a quantization domain does have an impact on the calculated spatial velocity transient.
Vlsi Design | 1998
W.-K. Shih; S. Jallepalli; C.-F. Yeap; Mahbub Rashed; C.M. Maziar; A.F. Tasch
Monte Carlo simulations of uniform silicon nMOSFET inversion layers have been performed. Excellent agreement between the simulated and experimental transport characteristics has been observed in the region of strong inversion at both 300K and 77K. The contribution to the effective mobility due to individual subbands has been analyzed and qualitatively explained.
Vlsi Design | 1998
Mahbub Rashed; W.-K. Shih; S. Jallepalli; R. Zaman; Thomas J. T. Kwan; C.M. Maziar
Electron transport in pseudomorphically-grown silicon on relaxed (001) Si1-xGex is investigated using a Monte Carlo (MC) simulation tool. The study includes both electron transport in bulk materials and in nMOS structures. The bulk MC simulator is based on a multiband analytical model, “fitted bands”, representing the features of a realistic energy bandstructure. The investigation includes the study of low- and high-field electron transport characteristics at 77 K and 300 K. Single particle MC simulations are performed for a strained silicon nMOS structure at room temperature. Both calculations show saturation of mobility enhancement in strained silicon beyond germanium mole fraction of 0.2.