Sang Jik Kwon

Cathodoluminescent Characteristics of a Spherical Y 2 O 3:Eu Phosphor Screen for Field Emission Display Application

The cathodoluminescent characteristics (CL) of a spherical Y 2 O 3 :Eu phosphor screen were investigated for field emission display application. The phosphor screen as an anode plate was vacuum sealed (∼3 × 10 -6 Torr) with 0.7 in, diagonal Si-based Mo tip field emitter array with 25 × 25 pixels. It was prepared by electrophoretically depositing spherical Y 2 O 3 :Eu phosphors, which were synthesized by the aerosol pyrolysis method. The character image was displayed on this anode plate by an external driver circuit with PWM driving scheme. The CL brightness of 41 cd/m 2 with CIE chromaticity of x = 0.649, y = 0.346 could be obtained at 400 V anode voltage and 55 V gate voltage inducing a 48 μA/cm 2 current density in the de mode, corresponding to 0.63 lm/W. However, screen efficiency could be increased to 1.24 lm/W by reducing the charge dose on the screen, of which the operating conditions were of 400 V anode voltage and 60 V p-p gate voltage inducing an average 30 μA/cm 2 emission current density in 15% pulse mode. It was found that the electrical resistivity of the phosphor screen was the origin of a pool image of displayed character and even caused a sudden decrease of emission light. The charging effects of spherical Y 2 O 3 :Eu phosphors screen on the luminance under low voltage operation are examined in this work and the methodology for enhancing picture quality is discussed based on experimental observation.

Process design and emission properties of gated n+ polycrystalline silicon field emitter arrays for flat-panel display applications

The gated n+ polycrystalline silicon (poly-Si) field emitter arrays (FEAs) have been designed and successfully fabricated on an oxidized silicon wafer for large display applications. The proposed structure of the FEAs eliminates the difficulty of having the cathode electrode (n+ diffusion layer)-to-cathode electrode isolation, which is common to crystalline silicon (c-Si) field emitter arrays. Compared with c-Si field emitters, poly-Si emitters showed poor uniformity in device structure such as emitter shape and gate hole, which was thought to be due to the variation of the grain size of poly-Si and the oxide thickness associated with grain boundaries of poly-Si in the sharpening oxidation step. The anode current of 0.1 μA/tip was measured at the gate bias of 82 V from poly-Si emitters with gate hole diameter of 1.2 μm under the vacuum pressure of 3×10−9 Torr. The same anode current was obtained at 80 V from c-Si emitters with the gate hole diameter of 1.6 μm. The gate leakage current for both the c-Si FE...

A study on the carrier injection mechanism of the bottom-contact pentacene thin film transistor

For an analysis of the mechanism of carrier injection in the structure of bottom contact organic thin-film transistor (OTFT), Al blocking layer was applied to the source/drain electrode in variety of ways in the fabrication of bottom contact OTFT. From the comparison of the transfer characteristics of the OTFTs with different electrodes, it is obvious that the main direction of carrier injection is mainly dependent on the thickness of electrode. When the electrodes become thicker and thicker, the main carrier injection path is expected to be located at the side of the electrodes as well as the top of the electrodes.

A novel fabrication process of a silicon field emitter array with thermal oxide as a gate insulator

We have successfully developed a fabrication process of a silicon field emitter array with a gate insulator formed by Si/sub 3/N/sub 4/ sidewall formation and subsequent thermal oxidation. This process overcomes some problems in the conventional fabrication, such as high etch rate, low breakdown field, and gate hole expansion arising from evaporation of gate oxide. Therefore, we could improve process stability and emission performance, and also reduce gate leakage current. The optimum process conditions were determined by process simulations using SUPREM-4. The turn-on voltage of the fabricated field emitters was approximately 38 V. An anode current of 0.1 /spl mu/A (1 /spl mu/A) per tip was measured for a 625-tip array at the gate bias of 80 V (100 V), and the gate current was less than 0.3% of the anode current at those emission levels. >

Influence of getter activation and aging in a frit-sealed field emission display panel

A field emission display (FED) panel system was successfully built through integration of a 0.7 in diagonal Si-based Mo-tip field emitter array with 25×25 pixels, a Y2O3:Eu or ZnO:Zn phosphor screen, and vacuum sealing through an exhausting glass tube, including a getter. The panel system was driven by an external driver circuit that has a pulse width modulation driving scheme. We have tried to evaluate quantitatively the activation effect of a getter. The getter activated at a relatively low temperature was shown to act as a good in situ minipump during the life of the FED. Before character imaging, it was stabilized through tip aging by slowly increasing a pulse-mode emission current and phosphor aging by a Coulombic charging process. After aging, luminescent characteristics such as emission uniformity, charging and arcing phenomena were shown to be improved significantly.

Plasma display panel vacuum in-line sealing technology by using a bubble-reduced frit

Improper base vacuum level in any vacuum microelectronic device, such as a plasma display panel (PDP), will damage the overall performance of the device due to impurities such as H2, O2, CO, CO2, and N2. In conventional tubulation packaging technology, the obtainable base vacuum level before plasma gas filling will be very poor because of the pumping conductance limitation for such a large panel size with a small gap of 150 μm, especially due to the barrier ribs inside the PDP panel. The time required to reach any reasonable level will be too long. In this study, we performed the sealing of the two glass plates composing the PDP panel, a plasma gas filling into the panel and a hole-off (named instead of a conventional “tip-off”) process, all in a vacuum chamber, called as “vacuum in-line sealing.” Several factors related with the heating process of a frit glass were investigated. A prepared frit glass was successfully applied for the vacuum in-line sealing approach without suffering bubbles. We successful...

Fabrication and characterization of gated n/sup +/ polycrystalline silicon field emitter arrays

Field emission characteristics from n/sup +/ polycrystalline silicon (poly-Si) field emitters fabricated on an insulating layer are presented and compared with those from single crystal silicon field emitters. SEM micrographs of fabricated poly-Si emitters showed poor uniformity in structure due to the oxide thickness deviation associated with grain boundaries of poly-Si in sharpening oxidation step. The anode current of 0.1 /spl mu/A/tip was measured at the gate bias of 82 V from 625 poly-Si tips with gate hole diameter of 1.2 /spl mu/m and 80 V from 625 single crystal Si tips with diameter of 1.6 /spl mu/m, respectively.

Fabrication of triode diamond field emitter arrays on glass substrate by anisotropic conductive film bonding

Gated pyramid-shaped polycrystalline diamond field emitter arrays (FEAs) were fabricated by microwave plasma chemical vapor deposition and the transfer mold technique. The FEAs were fabricated with various standard integrated circuit technologies and micromachine electromechanical system technologies; thermal oxidation, chemical wet etch, sputtering, and glass-to-metal bonding technique by using anisotropic conductive film (ACF). As a result of ACF bonding, thin flat film type FEAs were simply realized on an indium tin oxide coated glass substrate without the necessity of an additional cathode contact. Fabricated diamond FEAs were electrically characterized in triode configuration and an anode current of 237 nA was obtained at the gate bias of 120 V.

Fabrication and characterization of phosphorus-implanted mold-type diamond field-emitter arrays

Abstract Phosphorus implantation was applied to the fabrication of mold-type diamond field-emitter arrays (FEAs) for the first time. The fabricated diamond FEAs were structurally and electrically investigated and the results were compared with those of flat diamond films under the same implantation conditions. When the diamond films were implanted after they were grown by microwave-plasma chemical vapor deposition (MPCVD), improved field emission characteristics were obtained. From previous work and these electrical results, it is possible to infer that implanted phosphorus ions collect around the Mo–diamond interface and give rise to enhancement of the field emission properties from Mo to vacuum through diamond.

Vacuum in‐line sealing technology of the screen‐printed CNT‐FEA

Abstract We have fabricated a carbon nanotube field emission display (CNT‐FED) panel with a 2‐inch diagonal size by using a screen printing method and vacuum in‐line sealing technology. The sealing temperature of the panel was around 390 °C and the vacuum level was obtained with 1.4×10‐5torr at the sealing. When the field emission properties of a fabricated and sealed CNT‐FED panel were characterized and compared with those of the unsealed panel which was located in a test chamber of vacuum level similar with the sealed panel. As a result, the sealed panel showed similar I‐V characteristics with unsealed one and uniform light emission with very high brightness at a current density of 243 μA/cm2, obtained at the electric field of 10 V/μm.