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Dive into the research topics where Satoshi Oida is active.

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Featured researches published by Satoshi Oida.


Nature Communications | 2014

Graphene radio frequency receiver integrated circuit

Shu-Jen Han; Alberto Valdes Garcia; Satoshi Oida; Keith A. Jenkins; Wilfried Haensch

Graphene has attracted much interest as a future channel material in radio frequency electronics because of its superior electrical properties. Fabrication of a graphene integrated circuit without significantly degrading transistor performance has proven to be challenging, posing one of the major bottlenecks to compete with existing technologies. Here we present a fabrication method fully preserving graphene transistor quality, demonstrated with the implementation of a high-performance three-stage graphene integrated circuit. The circuit operates as a radio frequency receiver performing signal amplification, filtering and downconversion mixing. All circuit components are integrated into 0.6 mm(2) area and fabricated on 200 mm silicon wafers, showing the unprecedented graphene circuit complexity and silicon complementary metal-oxide-semiconductor process compatibility. The demonstrated circuit performance allow us to use graphene integrated circuit to perform practical wireless communication functions, receiving and restoring digital text transmitted on a 4.3-GHz carrier signal.


ACS Nano | 2013

High-Performance Air-Stable n-Type Carbon Nanotube Transistors with Erbium Contacts

Davood Shahrjerdi; Aaron D. Franklin; Satoshi Oida; John A. Ott; George S. Tulevski; Wilfried Haensch

So far, realization of reproducible n-type carbon nanotube (CNT) transistors suitable for integrated digital applications has been a difficult task. In this work, hundreds of n-type CNT transistors from three different low work function metals-erbium, lanthanum, and yttrium-are studied and benchmarked against p-type devices with palladium contacts. The crucial role of metal type and deposition conditions is elucidated with respect to overall yield and performance of the n-type devices. It is found that high oxidation rates and sensitivity to deposition conditions are the major causes for the lower yield and large variation in performance of n-type CNT devices with low work function metal contacts. Considerable improvement in device yield is attained using erbium contacts evaporated at high deposition rates. Furthermore, the air-stability of our n-type transistors is studied in light of the extreme sensitivity of these metals to oxidation.


Applied Physics Letters | 2013

Graphene radio frequency devices on flexible substrate

Wenjuan Zhu; Damon B. Farmer; Keith A. Jenkins; Bruce Ek; Satoshi Oida; Xuesong Li; J. Bucchignano; Simon Dawes; Elizabeth A. Duch; Phaedon Avouris

Graphene is a very promising candidate for applications in flexible electronics due to its high carrier mobility and mechanical flexibility. In this paper, we present results on graphene RF devices fabricated on polyimide substrates with cutoff frequencies as high as 10 GHz. Excellent channel mobility and current saturation are observed in graphene long channel devices on polyimide. Graphene devices on polyimide also show very good temperature stability from 4.4 K to 400 K and excellent mechanical flexibility up to a bending radius of 1 mm. These demonstrated properties make graphene an excellent candidate for flexible wireless applications.


Nature Nanotechnology | 2017

High-speed logic integrated circuits with solution-processed self-assembled carbon nanotubes

Shu-Jen Han; Jianshi Tang; Bharat Kumar; Abram Falk; Damon B. Farmer; George S. Tulevski; Keith A. Jenkins; Ali Afzali; Satoshi Oida; John A. Ott; James B. Hannon; Wilfried Haensch

As conventional monolithic silicon technology struggles to meet the requirements for the 7-nm technology node, there has been tremendous progress in demonstrating the scalability of carbon nanotube field-effect transistors down to the size that satisfies the 3-nm node and beyond. However, to date, circuits built with carbon nanotubes have overlooked key aspects of a practical logic technology and have stalled at simple functionality demonstrations. Here, we report high-performance complementary carbon nanotube ring oscillators using fully manufacturable processes, with a stage switching frequency of 2.82 GHz. The circuit was built on solution-processed, self-assembled carbon nanotube arrays with over 99.9% semiconducting purity, and the complementary feature was achieved by employing two different work function electrodes.


IEEE Electron Device Letters | 2013

Multifinger Embedded T-Shaped Gate Graphene RF Transistors With High

Shu Jen Han; Satoshi Oida; Keith A. Jenkins; Darsen D. Lu; Yu Zhu

Gate resistance plays a key role in determining the maximum oscillation frequency (fMAX) of all radio frequency transistors. This letter presents a new graphene device structure having multiple-finger T-shaped gates embedded in the substrate. The structure possesses several advantages over conventional top gate structures, including low gate resistance, low parasitic capacitance, scalable gate dielectric, and simple interconnect wiring. With 1 V drain bias, fMAX up to 20 GHz, and ~25%-43% higher than the current gain cutoff frequency (fT), is achieved from devices with a channel length down to 250 nm.


international electron devices meeting | 2011

f_{\rm MAX}/f_{T}

Davood Shahrjerdi; Aaron D. Franklin; Satoshi Oida; George S. Tulevski; Shu Jen Han; James B. Hannon; Wilfried Haensch

We present the first analysis of device yield and material composition for several low work-function metal contacts to carbon nanotubes (CNT), including the first demonstration of high-performance n-channel field-effect transistors (NFET) from erbium (Er) and lanthanum (La). Our results indicate drastic improvement in NFET yield by appropriate metal selection and optimization of deposition conditions.


international electron devices meeting | 2013

Ratio

Shu-Jen Han; Satoshi Oida; Hongsik Park; James B. Hannon; George S. Tulevski; Wilfried Haensch

Complementary logic gates based on chemically assisted directed assembly of solution carbon nanotubes with a high semiconducting purity (~91%) are demonstrated. Air stable, high quality carbon nanotube NFETs have been fabricated with low work function Erbium contacts, enabling an inverter gain of > 7 from transistors with 50 nm channel lengths. The substantial device yields of both NFET (~31%) and PFET (~44%) on the same chip allow us to construct and test a large number of CNT complementary logic gates for the first time. > 11% inverter yield from over 400 circuits tested along with fully functional NAND2 gates show promise of our fabrication scheme. This study points out several key directions for further yield enhancement, in which increasing the successful rate of CNT deposition into the trench plays a major role.


Journal of Applied Physics | 2011

High device yield carbon nanotube NFETs for high-performance logic applications

Satoshi Oida; F. R. McFeely; Ageeth A. Bol

Optimized chemical vapor deposition processes for single-walled carbon nanotube (SWCNT) can lead to the growth of dense, vertically aligned, mm-long forests of SWCNTs. Precise control of the growth process is however still difficult, mainly because of poor understanding of the interplay between catalyst, substrate and reaction gas. In this paper we use x-ray photoelectron spectroscopy (XPS) to study the interplay between Fe or Co catalysts, SiO2 and Al2O3 substrates and ethanol during the first stages of SWCNT forest growth. With XPS we observe that ethanol oxidizes Fe catalysts at carbon nanotube (CNT) growth temperatures, which leads to reduced carbon nanotube growth. Ethanol needs to be decomposed by a hot filament or other technique to create a reducing atmosphere and reactive carbon species in order to grow vertically aligned single-walled carbon nanotubes from Fe catalysts. Furthermore, we show that Al2O3, unlike SiO2, plays an active role in CNT growth using ethanol CVD. From our study we conclude ...


Applied Physics Letters | 2014

Carbon nanotube complementary logic based on Erbium contacts and self-assembled high purity solution tubes

Satoshi Oida; James B. Hannon; R. M. Tromp

We describe a process for the growth of a single, electronically decoupled graphene layer on SiC(0001). The method involves annealing in disilane to (1) prepare flat, clean substrates, (2) grow a single graphene layer, and (3) electronically decouple the graphene from the substrate. This approach uses a single process gas, at μTorr pressures, with modest substrate temperatures, thus affecting a drastic simplification over other processes described in the literature.


Applied Physics Letters | 2013

X-ray photoelectron spectroscopy study on Fe and Co catalysts during the first stages of ethanol chemical vapor deposition for single-walled carbon nanotube growth

Keith A. Jenkins; Damon B. Farmer; S.-J. Han; Christos D. Dimitrakopoulos; Satoshi Oida; Alberto Valdes-Garcia

The linearity of the radio frequency response of graphene field-effect transistors has been measured as a function of gate bias using the two-tone method. Two kinds of transistors, which differ in both the graphene source material and the device structure, have been compared. Both devices show high linearity compared to contemporary silicon transistors. The physical origins of this behavior are analyzed and discussed.

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