Satya V. Nitta

A 45 nm CMOS node Cu/Low-k/ Ultra Low-k PECVD SiCOH (k=2.4) BEOL Technology

A high performance 45nm BEOL technology with proven reliability is presented. This BEOL has a hierarchical architecture with up to 10 wiring levels with 5 in PECVD SiCOH (k=3.0), and 3 in a newly-developed advanced PECVD ultralow-k (ULK) porous SiCOH (k=2.4). Led by extensive circuit performance estimates, the detrimental impact of scaling on BEOL parasitics was overcome by strategic introduction of ULK at 2times wiring levels, and increased 1times wire aspect ratios in low-k, both done without compromising reliability. This design point maximizes system performance without adding significant risk, cost or complexity. The new ULK SiCOH film offers superior integration performance and mechanical properties at the expected k-value. The dual damascene scheme (non-poisoning, homogeneous ILD, no trench etch-stop or CMP polish-stop layers) was extended from prior generations for all wiring levels. Reliability of the 45 nm-scaled Cu wiring in both low-k and ULK levels are proven to meet the criteria of prior generations. Fundamental solutions are implemented which enable successful ULK chip-package interaction (CPI) reliability, including in the most aggressive organic flip-chip FCPBGA packages. This represents the first successful implementation of Cu/ULK BEOL to meet technology reliability qualification criteria

Designing engaging intelligent tutoring systems in an age of cognitive computing

Advances in human computer interaction (HCI) are enabling increasingly more human-like interactions with computers. In this position paper, we explore the impact of several such advances in HCI on the design of an intelligent tutoring system (ITS), with the hypothesis that such systems may drive deeper engagement and hence improve learning outcomes. Researchers have made claims regarding learning gains resulting from self-explanations, frequent addressing of errors and impasses, rich natural language understanding and dialog, appropriate degree of interactivity, and use of multiple representations. However, many studies on current ITSs that have embodied one or more of the above features are showing little to no discernible impact on learning. This is possibly partly due to the poor user experience. Our tutoring system is aimed at addressing learning challenges for K-12 students, by integrating a suite of differentiating technologies around interactivity, dialog, automated question generation, and learning analytics. In this paper, we first review learning theories and insights gleaned from prior research on ITSs that have inspired our design. We then describe the functional architecture of our tutoring system, followed by a preliminary report on the status of the prototype currently being built.

Causality Analysis of IT Capabilities to Achieve Maximum Business Outcomes

Outcome-based business (OBB) is a business model that directly links a service providers revenue or fee to the business value delivered by enabled services to the client. Its financial construct allows for a shared risk and reward model. Using OBB model, the service provider earns its revenue upon meeting mutually agreed benchmarks that affect these key client business outcomes. An OBB engagement typically requires establishing a long-term relationship with the client and reduces the risk for the client during the business transformation. A key component of an OBB business model is its ability to determine the impact of a particular IT solution on the performance of client financial and operational metrics. We outline a systematic method to enable us to do so. We begin with a process to identify gaps in the clients financial or operational performance. Then, we identify the business drivers that can improve those gaps. Next, we map the prioritized business drivers to the underlying IT capabilities that impact these drivers, creating a causal relationship chart called a service value map. Based on the causal relationship between the IT capabilities and the prioritized business drivers, we identify the priorities of the IT capabilities for gap improvement. In the second part of the analysis, we assume that each high level business driver can be measured by a metric (key performance indicator). With the help of a heuristic approach, we estimate the change of the metric over time using the service value map. This is accomplished by: 1) creating two baselines that define the bounds of the metric, and 2) using a maturity analysis to quantify the impact of the IT capabilities over time.

Nanoporous Materials Integration Into Advanced Microprocessors

Future microprocessor technologies will require interlayer dielectric (ILD) materials with a dielectric constant (κ-value) less than 2.5. Organosilicate glass (OSG) materials must be nanoporous to meet this demand. However, the introduction of nanopores creates many integration challenges. These challenges include 1) integrating nanoporous films with low mechanical strength into conventional process flows, 2) managing etch profiles, 3) processinduced damage to the nanoporous ILD, and 4) controlling the metal/nanoporous ILD interface. This paper reviews research to maximize mechanical strength by engineering optimal pore structures, controlling trench bottom roughness induced by etching and understanding its relationship to pore size, repairing plasma damage using silylation chemistry, and sealing a nanoporous surface for barrier metal (liner) deposition.

Copper BEOL Interconnects for Silicon CMOS Logic Technology

The semiconductor industry has been at the forefront of the technological revolution that has changed the way we live over the last three decades. The increase in performance of the integrated circuit (IC) chip has largely been due to the decreasing dimensions on the IC chip, leading to an increase in speed of the transistor. The transistors in an IC chip need to be connected to the outside world and the first level of hierarchy in this connection is the so called “back end of the line (BEOL) interconnect”. A typical BEOL interconnect consists of a metallic wire that is surrounded by an insulating cladding called the interlayer dielectric. Over the last few technology generations, it has become increasingly evident that shrinking device dimensions alone will not continue to achieve the increases in IC chip performance that the semiconductor industry needs. This is because the delay associated with sending signals through the BEOL interconnect begins to dominate the overall delay in the IC chip as seen in (Figure 2.1) [1]. The first step towards reducing this delay is to find a suitable metal that has a lower resistivity than aluminum (Al) to replace it as the wiring metal. Of all the elements in the periodic table, the most suitable candidate to replace Al as the wiring metal is copper (Cu). However, replacing Al with Cu as the metal of choice in BEOL interconnects is far from trivial.

Opportunities and challenges in ultra low k dielectrics for interconnect applications

In this paper, we discuss the challenges associated with producing, characterizing and integrating porous dielectrics into back-end-of-line (BEOL) interconnects and present results from our integration evaluations.

4C: Continuous Cognitive Career Companions

We explore the evolution of digital career advising companions for the rapidly growing knowledge economies to enable continuous evaluation and re-skilling of workforce in a wide range of domains. These companions deal with a variety of unstructured data sources to glean actionable insights. We present our experiences from building one such companion, and describe interesting natural language processing and machine learning challenges and open problems.