Seema B. Anand
Broadcom
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Publication
Featured researches published by Seema B. Anand.
international solid-state circuits conference | 2010
Chungyeol Paul Lee; Arya Reza Behzad; Bojko Marholev; Vikram Magoon; Iqbal Bhatti; Dandan Li; Subhas Bothra; Ali Afsahi; Dayo Ojo; Rozi Roufoogaran; T. Li; Yuyu Chang; Kishore Rama Rao; Stephen Au; Prasad Seetharam; Keith A. Carter; Jacob Rael; Malcolm MacIntosh; Bobby Lee; Maryam Rofougaran; Reza Rofougaran; Amir Hadji-Abdolhamid; Mohammad Nariman; Shahla Khorram; Seema B. Anand; E. Chien; S. Wu; Carol Barrett; Lijun Zhang; Alireza Zolfaghari
The growing occurrences of WLAN, BT, and FM on the same mobile device have created a demand for putting all three on the same die to save on die size, I/O count, BOM, and ultimately cost. Common blocks such as crystal oscillator, bandgap, and power management units can be easily shared. This paper presents a solution in which 802.11a/b/g WLAN, single-stream 11n (SSN) WLAN, BT, and FM subsystem and radio are integrated on a single die.
international solid-state circuits conference | 2003
Arya Reza Behzad; L. Lin; Z.M. Shi; Seema B. Anand; Keith A. Carter; M. Kappes; E. Lin; T. Nguyen; D. Yuan; S. Wu; Y.C. Wong; V. Fong; Ahmadreza Rofougaran
A 11.7mm/sup 2/ 5GHz direct-conversion 0.18/spl mu/m CMOS transceiver achieves a sensitivity of -93dBm, a system NF of 4.5dB (high gain), and IIP3 of -4.8dBm (low gain). Dissipation is 150mW in RX mode and 380mW while transmitting 15dBm OFDM signal.
international solid-state circuits conference | 2007
Bojko Marholev; Meng-An Pan; E. Chien; Lijun Zhang; Rozi Roufoogaran; S. Wu; Iqbal Bhatti; Tsung-Hsien Lin; Michael San Diego Kappes; Shahla Khorram; Seema B. Anand; Alireza Zolfaghari; Jesse Castaneda; Chin-Ming Chien; Brima Ibrahim; Henrik T. Jensen; Hea Joung Kim; Paul Lettieri; Siukai Mak; Jen-Yang Lin; Yuqian C. Wong; Reinierus Hendricus Maria van der Lee; Masood Syed; Maryam Rofougaran; Ahmadreza Rofougaran
A low-power single-chip Bluetooth EDR device is realized using a configurable transformer-based RF front-end, a low-IF receiver and direct-conversion transmitter architecture. It is implemented in a 0.13mum CMOS process and occupies 11.8mm2. Sensitivity for 1, 2 and 3Mb/s rates is -88, -90, and -84dBm and transmitter differential EVM is 5.5% rms.
IEEE Transactions on Circuits and Systems Ii-express Briefs | 2006
Aminghasem Safarian; Seema B. Anand; Payam Heydari
A comprehensive analytical study of regenerative frequency dividers (RFD) is presented. The study includes two fundamental modes of operation in RFDs, namely locked (or stable) and quasi-locked modes, and the study also covers the transition from free-running oscillation to quasi-locked, and ultimately to locked operation mode. Differential equations characterizing the RFD behavior for both operation modes as well as the transition between the two are derived. An RFD circuit for Bluetooth applications was designed and fabricated in a 65-nm CMOS process with a supply voltage of 1.2 V. Measurement results of the RFD prototype verify the accuracy of the proposed analytical models
radio frequency integrated circuits symposium | 2004
Arya Reza Behzad; E. Lin; Keith A. Carter; M. Kappes; Z.M. Shi; L. Lin; S. Wu; Seema B. Anand; T. Nguyen; D. Yuan; Y.C. Wong; V. Fong; B. Yeung; Ahmadreza Rofougaran
A fully integrated CMOS direct-conversion 5 GHz transceiver is implemented in a 0.18 /spl mu/m digital CMOS process and housed in an LPCC-48 package. This chip, along with a companion baseband chip, provides a complete 802.11a solution covering all of the world-wide 4.92-5.845 GHz bands. The receiver achieves a 3.5 dB NF while the transmitter achieves a +23 dBm saturated output power. The integrated PA utilizes a linearization technique to allow for high efficiency while maintaining the linear operation required by QAM64 OFDM signals. The transceiver achieves low cost and high yield through the use of various integrated self-contained or system level calibration techniques.
radio frequency integrated circuits symposium | 2014
Matteo Conta; Eric Rodal; Seema B. Anand; Henrik T. Jensen; Hu Huang; Yu-Wei Lin; Zhenhua Liu; Franco De Flaviis; Kamel Benboudjema
In order to achieve noise figure smaller than 1dB, the GNSS receivers require external LNA, which adds area, cost and current consumption. A 28nm CMOS sub-1dB NF 9mW GNSS receiver is presented, requiring no external components. This work takes advantage of symmetry in performance between NMOS and PMOS at 28nm node and demonstrates that low NF is possible on advanced CMOS at low power levels, with proper design of on-chip matching components.
radio frequency integrated circuits symposium | 2005
H. Darabi; Shahla Khorram; Zhimin Zhou; T. Li; Bojko Marholev; Janice Chiu; Jesus Alfonso Castaneda; E. Chien; Seema B. Anand; S. Wu; Meng-An Pan; Reza Rofougaran; Hea Joung Kim; Paul Lettieri; Brima Ibrahim; Jacob Rael; L. Tran; E. Geronaga; H. Yeh; T. Frost; J. Trachewsky; Ahmadreza Rofougaran
A fully integrated system-on-a-chip (SOC) intended for use in 802.11b applications is built in 0.18-/spl mu/m CMOS. All of the radio building blocks including the power amplifier (PA), the phase-locked loop (PLL) filter, and the antenna switch, as well as the complete baseband physical layer and the medium access control (MAC) sections, have been integrated into a single chip. The radio tuned to 2.4 GHz dissipates 165 mW in the receive mode and 360 mW in the transmit mode from a 1.8-V supply. The receiver achieves a typical noise figure of 6 dB and -88-dBm sensitivity at 11 Mb/s rate. The transmitter delivers a nominal output power of 13 dBm at the antenna. The transmitter 1-dB compression point is 18 dBm and has over 20 dB of gain range.
Archive | 2006
Bojko Marholev; Arya Reza Behzad; Meng-An Pan; Seema B. Anand
Archive | 2007
Jesus Alfonso Castaneda; Seema B. Anand; Maryam Rofougaran; Ahmadreza Rofougaran
Archive | 2002
Seema B. Anand