Seong-Wan Ryu

Sub-5nm All-Around Gate FinFET for Ultimate Scaling

Sub-5nm all-around gate FinFETs with 3nm fin width were fabricated for the first time. The n-channel FinFET of sub-5nm with 1.4nm HfO2 shows an IDsat of 497muA/mum at VG=V D=1.0V. Characteristics of sub-5nm transistor are verified by using 3-D simulations as well as analytical models. A threshold voltage increases as the fin width reduces by quantum confinement effects. The threshold voltage shift was fitted to a theoretical model with consideration of the first-order perturbation theory. And a channel orientation effect, based on a current-flow direction, is shown

Nonvolatile memory based on sol-gel ZnO thin-film transistors with Ag nanoparticles embedded in the ZnO/gate insulator interface

A nonvolatile memory is demonstrated using a solution-processed sol-gel ZnO thin-film transistor (TFT) in which Ag nanoparticles are embedded as charge storage nodes at the insulator-ZnO interface. Its TFT transfer characteristics exhibit a large clockwise hysteresis that is proportional to the gate bias sweep range. Measurement of the threshold voltage shift versus the pulse width of gate bias reveals that the device can be programed or erased at a time scale of as short as 10−4 s. Retention of the initial memory window is measured to be 27% after 105 s and projected to last until 107 s.

Energy band engineered unified-RAM (URAM) for multi-functioning 1T-DRAM and NVM

A novel fusion memory is proposed as a new paradigm of silicon based memory technology. An O/N/O gate dielectric and a floating body are combined with a FinFET, and the non-volatile memory (NVM) and high speed capacitorless 1T-DRAM are performed in a single transistor. A nitride trap layer is used as an electron storage node for NVM, and hetero-epitaxially grown Si/Si1-xGex energy band engineered bulk substrates allow excess hole storage for 1T-DRAM. Highly reliable 1T-DRAM and NVM are demonstrated.

Gold nanoparticle embedded silicon nanowire biosensor for applications of label-free DNA detection

Gold nanoparticle (GN) embedded silicon nanowire (SiNW) configuration was proposed as a new biosensor for label-free DNA detection to enhance the sensitivity. The electric current flow between two terminals, a source and a drain electrode, were measured to sense the immobilization of probe oligonucleotides and their hybridization with target oligonucleotides. The complementary target oligonucleotide, breast cancer DNA with 1 pM, was sensed. In addition, its sensing mechanism and limit of detection (LOD) enhancement was investigated through simulation. The results support that the LOD can be improved by reducing the SiNW doping concentration. This emerging architecture combined nanostructure of spherical GN and SiNW has high potential as a label-free biosensor due to its facile fabrication process, high thermal stability, immobilization efficiency with a thiol-group in a self-assembled monolayer (SAM), and improved sensitivity.

A Bulk FinFET Unified-RAM (URAM) Cell for Multifunctioning NVM and Capacitorless 1T-DRAM

A bulk FinFET-based unified-RAM (URAM) cell technology is demonstrated for the fusion of a nonvolatile-memory (NVM) and capacitorless 1T-DRAM. An oxide/nitride/oxide layer and a floating-body are combined to perform a URAM operation in a single transistor. A buried n-well technology for NMOS allows hole accumulation for the 1T-DRAM operation in a p-type bulk substrate. The bulk FinFET URAM offers a cost-effective and fully compatible process with a conventional FinFET SONOS, and it also expedites heat dissipation. Highly reliable NVM and high-speed 1T-DRAM operation are confirmed, and it was also verified that there is no disturbance between the two memory functions.

Itinerant Helimagnetic Single-Crystalline MnSi Nanowires

We report the synthesis of free-standing MnSi nanowires via a vapor transport method with no catalyst and measurements of their electrical and magnetic properties for the first time. The single-crystalline MnSi nanowire ensemble with a simple cubic (B20) crystal structure shows itinerant helimagnetic properties with a T(c) of about 30 K. A single MnSi nanowire device was fabricated by a new method using photolithography and a nanomanipulator that produces good ohmic contacts. The single-nanowire device measurements provide large (20%) negative magnetoresistance and very low electrical resistivity of 544 microOmegacm for the MnSi nanowire.

A Unified-RAM (URAM) Cell for Multi-Functioning Capacitorless DRAM and NVM

A novel partially-depleted (PD) SONOS FinFET is demonstrated for unified function of a high speed capacitorless IT-DRAM and non-volatile memory (NVM). A floating body and O/N/O layer are combined in a single FinFET to provide multi-functional unified-RAM (URAM) operation. The fabricated URAM shows a VT window of 3 V with a retention time exceeding 10 years for NVM operation and a sensing margin of 9 muA with a program/erase time of 10 nsec for IT-DRAM operation in a single memory cell transistor.

Designed Workfunction Engineering of Double-Stacked Metal Nanocrystals for Nonvolatile Memory Application

A double-stacked nanocrystal (DSNC) flash memory is presented for improvement of both program/erase (P/E) speed and data retention time. Four combinations of nickel (Ni) and gold (Au) (Ni/Ni, Au/Au, Ni/Au, and Au/Ni) are used as charge storage DSNC materials and are compared from the perspective of memory performance. Through experimental results for P/E efficiency and retention time, the optimized energy band lineup for faster P/E and longer charge retention is presented. A combination of a deep potential well at the top and a shallow potential well at the bottom exhibits optimized performance in P/E, and this combination also shows the longest data retention characteristics.

Gate-Induced Drain-Leakage (GIDL) Programming Method for Soft-Programming-Free Operation in Unified RAM (URAM)

A soft-programming-free operation method in unified RAM (URAM) is presented. An oxide/nitride/oxide (O/N/O) layer and a floating-body are integrated in a FinFET, thereby providing the versatile functions of a high-speed capacitorless 1T-DRAM, as well as nonvolatile memory, and the mode of the memory cell can be selected and independently utilized according to the designers demand. With the utilization of the impact ionization method for 1T-DRAM programming, undesired soft charge trapping into O/N/O gradually shifts the threshold voltage, resulting in an unstable operation in the URAM. In order to avoid such problems associated with soft programming, a gate-induced drain-leakage (GIDL) program method is proposed for improved immunity to disturbance. It is found that the GIDL method effectively suppresses soft programming without sacrificing the sensing current window.

A thickness modulation effect of HfO2 interfacial layer between double-stacked Ag nanocrystals for nonvolatile memory device applications

This paper presents a detailed study on the effect of different thicknesses of HfO2 high-k interfacial layer between double-stacked layers of Ag nanocrystals formed by a chemical synthesis and thermal decomposition method. To confirm the formation and purity of the well-ordered Ag nanocrystals with a high density (2.7×1012cm−2), transmission electron microscopy and x-ray diffraction analysis were used. After fabricating metal-oxide-silicon structures with 2 and 6nm interfacial HfO2 and the double-stacked Ag nanocrystals, a program efficiency and retention time characteristics were investigated.