Sergio Benedetto

Design of parallel concatenated convolutional codes

A parallel concatenated convolutional coding scheme consists of two constituent systematic: convolutional encoders linked by an interleaver. The information bits at the input of the first encoder are scrambled by the interleaver before entering the second encoder. The codewords of the parallel concatenated code consist of the information bits followed by the parity check bits of both encoders. Parallel concatenated codes (turbo codes), decoded through an iterative decoding algorithm of relatively low complexity, have been shown to yield remarkable coding gains close to theoretical limits. We characterize the separate contributions that the interleaver length and constituent codes give to the overall performance of the parallel concatenated code, and present some guidelines for the optimal design of the constituent convolutional codes.

Nonlinear Equalization of Digital Satellite Channels

Conventional techniques attempting to compensate for the influence of linear and nonlinear distortion in digital satellite channels include optimization of channel filtering. With conventional linear filtering it has been experienced that there is still room for considerable improvement, so that it appears reasonable to investigate some forms of nonlinear filtering in an attempt to cope with those distortions. In this paper a nonlinear equalizer structure is proposed, and its performance is analyzed. It is shown, by some examples Of application to a 4-phase PSK satellite channel, that it can prove quite effective in terms of a tradeoff between performance improvement and hardware complexity.

Optical Fiber Communication Systems

The Communications Toolbox: Introduction. Probability and Random Variables. Some Important Probability Distributions. Signals and Systems. Random Processes. Spectral Analysis. Narrowband Signals and Systems. Elements of Detection Theory. From Light to Signals. Basic Optical Fiber Communications Components: Introduction. The Refractive Index and the Laws of Reflection and Refraction. Total Internal Refraction. Step Index Fibers and Slab Waveguides. Maxwells Equations in the Slab Waveguide. Even Propagation Modes. Odd Propagation Modes. Number of Modes and Single-Mode Fibers. Phase Velocity. Group Velocity. Attenuation and Dispersion. Dispersion-Shifted and Dispersion-Flattened Fibers. Polarization-Maintaining and Single-Polarization Fibers. The P-N Junction. Single Heterostructure. Double Heterostructure. LED Physical Structure. The LED Rate Equation. LED Output Spectrum. LED Modulation Response. The Fabry-Perot Resonator. Semiconductor Laser Physical Structure. Laser Output Spectrum--Spectral Width and Linewidth. Bragg Reflections. Distributed Feedback (DFB) and Distributed Bragg Reflection (DBR) Lasers. Rate Equations. The Steady-State Solution to the Rate Equations. Laser Modulation--Step Response. Laser Modulation--Sinusoidal Frequency Response. Relative Intensity Noise (RIN), Phase and Frequency Noise, Chirp. Laser Package. The PIN Photodiode. The Avalanche Photodiode, ADP. Basic Binary Optical Communication System: Introduction. System Description. Performance Evaluation. Coherent Systems: Motivations and Basics. Fundamental Receiver Sensitivity--Homodyne Systems. Heterodyne Systems--Synchronous Detection. Heterodyne Systems--Asynchronous Detection. Heterodyne Systems--Weakly Synchronous Detection. Summary and Comparison of Fundamental Sensitivities. Optical Hybrids. Phase Noise and Linewidth. Synchronous Systems. Asynchronous Systems. Weakly Synchronous Systems. How to Deal with Phase Noise--Summary. Polarization Fluctuations. Appendix A--Statistics of Phase Noise to Amplitude Conversion. Appendix B--Evaluation of Averages by Quadrature Rules. Optical Amplifiers: Introduction. Semiconductor Amplifiers. Erbium-Doped Fiber Amplifier. Comparison of Major SOA and EDFA Characteristics. Other Fiber Amplifiers. Soliton Systems: Intuitive Explanation of Solitons. Advantages of Solitons for Long Distance Transmission. Derivation of Solitons. Amplitude, Duration, Energy, and Power. Higher-Order Solitons. Qualitative Physical Explanation of Solitons. Estimation of Peak Pulse Power Required for Solitons. Fiber Loss and its Compensation. Lumped Amplifiers in Soliton Systems. Polarization Dispersion. Amplified Spontaneous Emission Noise in Soliton Systems. Error Rates in Soliton Systems. Soliton Experiments. Using Recirculating Loops. Wavelength Division Multiplexing with Solitons. Bidirectional Soliton Systems. Sources of Soliton Pulses. Beyond the Gordon-Haus Limit. Multichannel Systems: Introduction. Time-Division Multiplexing (TDM). Wavelength-Division Multiplexing. Subcarrier Multiplexing. Code-Division Multiplexing. Space-Division Multiplexing. Network Issues.

Parallel concatenated trellis coded modulation

In this paper, we propose a new solution to parallel concatenation of trellis codes with multilevel amplitude/phase modulations and a suitable bit by bit iterative decoding structure. Examples are given for throughput 2 and 4 bits/sec/Hz with 8 PSK, 16 QAM, and 64 QAM modulations. For parallel concatenated trellis codes in the examples, rate 2/3 and 4/5, 8, and 16-state binary convolutional codes with Ungerboeck mapping by set partitioning (natural mapping), a reordered mapping, and Gray code mapping are used. The performance of these codes is within 1 dB from the Shannon limit at a bit error probability of 10/sup -7/ for a given throughput, which outperforms the performance of all codes reported in the past for the same throughput.

Soft-Input Soft-Output Modules for the Construction and Distributed Iterative Decoding of Code Networks

Soft-input soft-output building blocks (modules) are presented to construct and iteratively decode in a distributed fashion code networks, a new concept that includes, and generalizes, various forms of concatenated coding schemes. Among the modules, a central role is played by the SISO module (and the underlying algorithm): it consists of a four-port device performing a processing of the sequences of two input probability distributions by constraining them to the code trellis structure. The SISO and other soft-input soft-output modules are employed to construct and decode a variety of code networks, including “turbo codes” and serially concatenated codes with interleavers.

Computing the free distance of turbo codes and serially concatenated codes with interleavers: algorithms and applications

We present a new algorithm for computing the free distance d/sub free/ of parallel and serially concatenated codes with interleavers, the parameter that dominates the code performance at very high signal-to-noise ratios (SNRs). The knowledge of d/sub free/ allows one to analytically estimate the error floor, which may prevent the use of concatenated codes in applications requiring very low error rates. The algorithm is based on the new notion of constrained subcodes, and permits the computation of large distances for large interleavers without a constraint on the input sequence weight (e.g., up to d/sub free/=40 for a rate-1/3 turbo code with interleaver length N=3568). Applications to practical cases of relevant interest, i.e., (1) the new Consultative Committee for Space Data Systems (CCSDS) standard for deep-space telemetry and (2) the new UMTS/3GPP standard for third-generation personal communications, are presented for the first time. Other related aspects, like a study on the free distance distribution of turbo codes with small/medium interleaver length, and a comparison between parallel and serial concatenation behavior, are also discussed.

Performance evaluation of TH-PPM UWB systems in the presence of multiuser interference

This letter presents a new method for the evaluation of the bit error probability of a time hopping binary pulse position ultra-wideband modulation scheme, in the presence of multiuser interference. The technique permits to predict the system performance with high accuracy and reasonable complexity. A perfect agreement with simulation results is shown, and a comparison with the Gaussian approximation is presented.

Theory of polarization shift keying modulation

A rigorous analysis of digital coherent optical modulation schemes using the state of polarization as the modulating parameter is presented. The analysis obtains the exact performance of all the polarization-based modulation schemes proposed in the literature so far, including a differential demodulation scheme, named DPOLSK, which does not require either electrooptic or electronic polarization tracking. Preliminary results involving multilevel transmission schemes based on the state of polarization are introduced. A spectral analysis of POLSK signals is also proposed. >

Mapping interleaving laws to parallel turbo and LDPC decoder architectures

For high-data-rate applications, the implementation of iterative turbo-like decoders requires the use of parallel architectures posing some collision-free constraints to the reading/writing process from/into the memory. This consideration applies to the two main classes of turbo-like codes, i.e., turbo codes and low-density parity-check (LDPC) codes. Contrary to the literature belief, we prove in this paper that there is no need for an ad hoc code design to meet the parallelism requirement, because, for any code and any choice of the scheduling of the reading/writing operations, there is a suitable mapping of the variables in the memory that grants a collision-free access. The proof is constructive, i.e., it gives an algorithm that obtains the desired collision-free mapping. The algorithm is applied to two simple examples, one for turbo codes and one for LDPC codes, to illustrate how the algorithm works.

Design of fixed-point iterative decoders for concatenated codes with interleavers

We discuss the effects of quantization on the performance of the iterative decoding algorithm of concatenated codes with interleavers. Quantization refers here to the log-likelihood ratios coming from the soft demodulator and to the extrinsic information passed from one stage of the decoder to the next. We discuss the cases of a single soft-input soft-output (SISO) module, in its additive log-likelihood version (L-SISO), performing sequentially all iterations (an implementation solution coping with medium-low data rate as compared with the hardware clock), and that of a pipelined structure in which a dedicated hardware is in charge of each SISO operation (an implementation suitable for high data rates). We give design rules in both cases, and show that a suitable rescaling of the extrinsic information yields almost ideal performance with the same number of bits (five) representing both log-likelihood ratios and extrinsic information at any decoder stage.