Serguei Stoukatch

Mechanical reliability of Au and Cu wire bonds to Al, Ni/Au and Ni/Pd/Au capped Cu bond pads

This work is an assessment of the mechanical reliability of Au and Cu ball bonds to Al, Ni/Au and Ni/Pd/Au surfaces in terms of high temperature storage. All systems show very good shear strength after thermal storage for up to 120 days at 150 °C. The Au ball bonds on Al surface show Kirkendall voiding starting from 60 days. This did not decrease their mechanical strength but it is expected to become a reliability issue in the long run. The Cu wire bonds on Al caps show a higher initial strength, much slower intermetallics formation and no Kirkendall voiding. This makes them a potentially better industrial solution. Excellent bond strength was found for Cu- and Au-bonds on Ni/Au and Ni/Pd/Au caps. No intermetallics formation or other microstructural change have been found on these interfaces up to 120 days at 150 °C, which was related to the full solubility of the materials along these interfaces. This result suggests that they can be a successful industrial solution for the next generation of packages.

Analysis of the Induced Stresses in Silicon During Thermcompression Cu-Cu Bonding of Cu-Through-Vias in 3D-SIC Architecture

A new approach to 3D stacking of chips is being developed at IMEC and is called 3D-stacked IC (3D-SIC). In this approach, interconnection between strata is achieved by thermo-compression bonding of Cu-vias to a Cu-landing pad. In this paper we use finite element methods to study the influence of the resultant induced stresses in silicon as a result of CTE mismatch between silicon and copper and that also caused by the applied thermo-compression bonding force. Bonding temperature is found to be the main cause of induced stresses during thermo-compression bonding. The induced stresses decreased with a decrease in the silicon thickness. The keep-away-zone of the transistors from the influence of stresses from the Cu-vias is found to be dependent on the diameter of the Cu-via and the doping concentration of the transistors.

Direct gold and copper wires bonding on copper

Abstract The key to bonding to copper die is to ensure bond pad cleanliness and minimum oxidation during wire bonding process. This has been achieved by applying a organic coating layer to protect the copper bond pad from oxidation. During the wire bonding process, the organic coating layer is removed and a metal to metal weld is formed. This organic layer is a self-assembled monolayer. Both gold and copper wires have been wire-bonded successfully to the copper die even without prior plasma cleaning. The ball diameter for both wires are 60 μm on a 100 μm fine pitch bond pad. The effectiveness of the protection of the organic coating layer starts from the wafer dicing process up to the wire bonding process and is able to protect the bond pad for an extended period after the first round of wire bond process. In this study, oxidization of copper bond pad at different packaging processing stages, dicing and die attach curing, have been explored. The ball shear strength for both gold and copper ball bonds achieved are 5 and 6 g/mil2 respectively. When subjected to high temperature storage test at 150 °C, the ball bonds formed by both gold and copper wire bond on the organic coated copper bondpad are thermally stable in ball shear strength up to a period of 1440 h. The encapsulated daisy chain test vehicle with both gold and copper wires bonding have passed 1000 cycles of thermal cycling test (−65 to 150 °C). It has been demonstrated that orientation imaging microscopy technique is able to detect early levels of oxidation on the copper bond pad. This is extremely important in characterization of the bondability of the copper bond pad surface.

Single-package 5GHz WLAN RF module with embedded patch antenna and 20dBm power amplifier

The demanding requirements of emerging telecom standards compel designers to conceive transceivers that integrate building blocks designed in different technologies. Such heterogeneous systems, together with the need for miniaturization, require packaging and integration techniques more involved than all current reported work. By combining a thin-film technology on a glass substrate (MCM-D) with laminates for the ball grid array (BGA) package, we can integrate, in a single package, a 5 GHz WLAN RF module. The package includes a BiCMOS IC, a GaAs power amplifier (PA) with 20 dBm output compression, a GaAs TX/RX switch with 1 dB insertion loss, high-quality integrated RF filters and a patch antenna with more than 80% efficiency.

A reliable and compact polymer-based package for capacitive RF-MEMS switches

We present a package for capacitive RF-MEMS switches that is based on laminate substrates and BCB-sealed glass caps. The assembly is realised using standard packaging equipment. The package is only 1.1 mm thick, gross leak tight, has high mechanical strength, and passes accelerated lifetime testing. RF insertion loss was lower than 0.6 dB below 15 GHz. Capacitive switches packaged by the proposed method reach a lifetime of 10/sup 7/ cycles, and sustain 1000 h exposure at 85/spl deg/C/85%RH.

3D-SIP integration for autonomous sensor nodes

This paper presents details of a 3D-SIP approach. It involves a package-on-package system level integration method that leads to a 3D stack where the different layers are individual sub-system SIP circuit blocks. By using this approach, the required number of connections between the SIP packages is greatly reduced. A SIP also offers sufficient 3D-interconnect density between the functional layers. Using a 3D SIP approach of integration, a wireless bio-electronic sensor node was realized. This system includes a low-power radio, a matched antenna, a microcontroller with a 12 bit ADC, crystal oscillators, all necessary passives and a custom designed EEG ASIC. The currently demonstrated device is a portable, electroencephalogram (EEG) system for brain activity monitoring

Characterisation, modelling and design of bond-wire interconnects for chip-package co-design

This work is a comprehensive experimental investigation of chip to package wirebond interconnects for chip-package co-design. Wirebonds are interconnect bottlenecks in RF design, but are difficult to avoid due to their low cost and manufacturing ease. We have shown measurements on wirebonds in coplanar configuration with different return paths and also the cross coupling. We have also extracted lumped and distributed models and demonstrate the excellent agreement with measurements atleast upto 15GHz. We have proposed multi-wirebonds as a potential solution for better impedance matching. Different types of inductors with Q-factors of upto 100 have also been illustrated. We show influence of encapsulant on wirebonds and finally we also demonstrate a methodology to extract the time-domain response from S-parameters.

The influence of packaging materials on RF performance

Abstract At frequencies beyond 1 GHz, every component of the IC package contributes to the RF performance, whether required or not. In this work, we study the effects of packaging materials namely, the substrate and the globtop/underfill material on RF performance. We have measured interconnects on two area-array CSPs, the ball grid array and the polymer stud grid array using IMEC’s MCM-D technology. The measurements on the package interconnect show that the losses in the package substrate material account for about 50% of the total losses at 1.8 GHz and this drops to less than 20% at 5.2 GHz. The losses due to impedance mismatch dominate the losses especially below 10 GHz and considerable improvement in performance cannot be obtained by using an improved/expensive substrate. The other study is about the influence of globtop/underfill materials on wirebonds (through 3D EM simulations) as well as on standard 50 Ω MCM-D transmission lines (through experiments). While a higher value of dielectric constant of the globtop/underfill material is better on wirebonds, the influence of loss tangent is felt only above values of 0.1. The influence of seven different globtop/undefill materials on 50 Ω transmission lines has been used to extract their dielectric constant and loss tangent values at 30 GHz. These results are very valuable since one can hardly find the properties of globtop/underfill materials beyond 1 GHz.

RF-MEMS technology platform for agile mobile and satellite communications

In the past years, the RF-MEMS activities have focused on the development of generic technology platforms integrating switches as well as tunable and fixed passives components. This is in strict opposition to a former device-centered development of the RF-MEMS technologies. Fruitful efforts were put at IMEC in the reliability analysis and modeling of the devices, the exploration of various packaging scenario and finally the process optimization to allow the handling of the devices throughout the full packaging chain. In this paper, we present several results of these developments. Various architectures of functional narrowband and wideband RF-MEMS capacitive switches are demonstrated, all processed on a single wafer, in the same process flow. The demonstrated working frequencies are 40GHz, 35GHz, 18GHz and 6GHz with measured lifetimes in excess of 107 cycles at 100Hz switching frequency in N2 atmosphere. Representative insertion loss and isolation are respectively better than 0.4dB and 20dB. Finally, we report the realization of a hybrid MEMS/MCM-D filter for GPS-GALILEO band-switching

Mechanical behavior of BEOL structures containing lowK dielectrics during bonding process

New challenges present themselves for the back end of line of IC processing. Copper lines replace aluminum lines to take advantage of the higher electrical conductance of copper. At the same time, lowK polymers are introduced in the structure in order to reduce the electrical losses. On the other hand, these lowK materials are mechanically weak. From the packaging side, copper wire bonding replaces the up to now commonly used gold wire bonding. Since copper has a higher yield stress than gold, higher forces are required to form a satisfying wire bond. Therefore higher forces act on a mechanical weak structure. In this study, the modeling of the bond deformation and the modeling of the stresses in the bond pad structure are decoupled. In a first phase, the bond deformation is modeled. The pressure in the contact zone with the bond pad is extracted. Due to a high hydrostatic component in the stresses, this pressure can be higher than the yield stress of the bond. The highest pressure is found at the beginning of the bond deformation, where the contact area is still small. Normalized pressure curves are set up where the yield stress of the bond is considered as a parameter. In a second phase, two bond pad structures are compared: copper pad direct on oxide and copper pad on a blanket lowK dielectric layer. The lowK layer provides a deficient mechanical support, resulting in high stresses in the copper pad. A nickel capping, used to prevent the copper pad from oxidizing, redistributes the pressure evenly over the copper pad. When no capping is used, a strong local deformation is found at the edge of the bond.