Seunghoon Jee

Optimized Design of a Highly Efficient Three-Stage Doherty PA Using Gate Adaptation

We demonstrate an optimized design of a highly efficient three-stage Doherty power amplifier (PA) for the 802.16e mobile world interoperability for microwave access (WiMAX) application at 2.655 GHz. The “three-stage” Doherty PA is the most efficient architecture among the various Doherty PAs for achieving a high peak to average power ratio (PAPR) signal. However, it has a problem in that the carrier PA has to maintain a saturated state with constant output power when the other peaking PAs are turned on. We solved the problem using a gate envelope tracking (ET) technique. For the proper load modulation, the gate biases of the peaking PAs were adaptively controlled, and the peak power and maximum efficiency characteristics along the backed-off output power region were successfully achieved. Using Agilents Advanced Design System and Matlab simulations, the overall behavior of the three-stage Doherty PA with the ET technique employed was fully analyzed, and the optimum design procedure is suggested. For the WiMAX signal with a 7.8-dB PAPR, the measured drain efficiency of the proposed three-stage Doherty PA is 55.4% at an average output power of 42.54 dBm, which is an 8-dB backed-off output power. Digital predistortion was used to linearize the proposed PA. After linearization, a -33.15 dB relative constellation error performance was achieved, satisfying the system specifications. This is the best performance of any 2.655-GHz WiMAX application ever reported, and it clearly shows that the proposed three-stage Doherty PA is suitable as a highly efficient and linear transmitter.

The Doherty Power Amplifier: Review of Recent Solutions and Trends

In this paper, an extensive review of the most up-to-date papers on microwave Doherty power amplifiers is presented. The main applications are discussed, together with the employed semiconductor technologies. The different research trends, all aimed to improve the advantages of the Doherty scheme and to solve its inherent drawbacks, are presented. The first considered topic is the maximization of efficiency and/or linearity, where analog and digital techniques are exploited. Another important trend is the bandwidth enlargement of the Doherty architecture, that involves a large number of papers. Multi-band, multi-mode solutions are also considered, using either fixed or reconfigurable solutions. The final section is dedicated to the most significant Doherty integrated implementations.

Saturated Power Amplifier Optimized for Efficiency Using Self-Generated Harmonic Current and Voltage

A saturated power amplifier (PA) optimized for efficiency is described. As a PA is driven into saturated operation, the current source of the device generates a large third harmonic current, which creates a quasi-rectangular current waveform. The large nonlinear output capacitor of the transistor generates a second harmonic voltage with a very small third harmonic component. The second harmonic voltage is in-phase with the fundamental voltage, making a half-sine wave voltage waveform with voltage peaking. These waveforms are similar to those of a class F-1 . The fundamental load at the intrinsic device is resistive with the output capacitance tuned out, which is identical to the class F-1 case. However, the required harmonic impedances are just larger than the impedance levels of the output capacitance for both the second and third harmonics. Therefore, the circuit topology is similar to that of a class E amplifier, which is very simple. The PA implemented using a GaN HEMT delivers the expected good performance using the simple circuit topology.

Behaviors of Class-F and Class-

Operational behaviors of the class-F and class-F-1 amplifiers are investigated. For the half-sinusoidal voltage waveform of the class-F-1 amplifier, the amplifier should be operated in the highly saturated region, in which the phase relation between the fundamental and second harmonic currents are out-of-phase. The class-F amplifier can operate at the less saturated region to form a half sinewave current waveform. Therefore, the class-F-1 amplifier has a bifurcated current waveform from the hard saturated operation, but the class-F amplifier operates as a switch at the saturated region for a second harmonic tuned half-sine waveform. To get the hard saturated operation, the fundamental load is very large, more than √2 times larger than that of the tuned load amplifier. The operational behaviors of the amplifiers are explored with the nonlinear output capacitor. Since the capacitor generates a large second harmonic voltage with smaller higher order terms, the class- F-1 amplifier with the nonlinear capacitor can deliver the proper half-sinusoidal voltage waveforms at a lower power, but the effect of the nonlinear capacitor is small for the class-F amplifier. The class-F-1 amplifier delivers the superior performance at the highly saturated operation due to its larger fundamental current and voltage generation at the expense of the larger voltage swing. The simulation results lead to the conclusion that the class-F-1 amplifier with the nonlinear capacitor is suitable topology for high efficiency. However, in the strict sense, the class- F-1 amplifier with the nonlinear capacitor is not the classical class-F-1 amplifier because the voltage-shaping mechanisms and the fundamental load are quite different. We call it the saturated amplifier since the amplifier is the optimized structure of the power amplifier operation at the saturated mode.

{\hbox{F}}^{-1}

We have proposed two methods of enhancing efficiency of an envelope tracking power amplifier (ET PA) from an interlock operation. The first is the utilization of sinking current. The sinking current is a critical efficiency reduction factor since it is a wasted power. To reduce the sinking current, the gate bias of the power amplifier (PA) is increased so that the sinking current is delivered to the PA and is utilized for amplification. The other one is the RF input shaping method. The input signal of ET PAs is a modulated RF signal, and the signal does not guarantee fully saturated operation of the PA at all power levels due to

Amplifiers

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Optimization of Envelope Tracking Power Amplifier for Base-Station Applications

nonlinearity of a device. To obtain the maximum efficiency for all of the envelope voltage, we have found the optimum RF input conditions and applied it to the input of the PA. To verify the methods, the proposed ET PA is implemented using a Cree CGH40045 GaN HEMT. For a long-term evolution 5-MHz signal with 6.5-dB peak-to-average power ratio, the PA delivers power-added efficiency of 58.76% with 40.14-dBm output power at 889 MHz.

Doherty amplifier with envelope tracking for high efficiency

A Doherty amplifier assisted by a supply modulator is presented using 2.14 GHz GaN HEMT saturated power amplifier (PA). A novel envelope shaping method is applied for high power-added efficiency (PAE) over a broad output power range. Experimental comparison with the Doherty and saturated PAs with the supply modulator is carried out. For the 8 dB crest factor WCDMA 1FA signal, the Doherty PA supported by the modulator presents the improved PAE over the broad output power region compared to the standalone Doherty PA. In addition, it achieves better PAE than the saturated PA with the supply modulator due to the lower crest factor envelope signal applied to the Doherty PA. At the maximum average output power, back-off by 8 dB from the peak power, the Doherty amplifier employing bias adaptation shows the PAE of 50.9%, while the comparable saturated PA with supply modulator and standalone saturated Doherty amplifier and saturated PA provide the PAEs of 42.3%, 49.7%, and 35.0%, respectively.

A 2.14-GHz GaN MMIC Doherty Power Amplifier for Small-Cell Base Stations

A novel 2.14-GHz Doherty power amplifier (PA) was designed and fabricated using a 0.25- μm GaN on SiC monolithic microwave integrated circuit (MMIC), to build small-cell base stations. To reduce the size and loss, lumped passive elements were employed in a manner of minimizing the device count. The core components of the PA were integrated on the MMIC die to reduce the area, and low-loss chip inductors were mounted around the die to enhance the efficiency. An unconventional uneven power splitting was also used to enhance the performance. For a continuous wave, a 2-dB-gain-compression power of 40.5 dBm was obtained with a drain efficiency (DE) of 60.4%. At 7.3-dB backed-off power, a DE of 52.2% was obtained with a power gain of 15.7 dB. When a 10-MHz-bandwidth long-term evolution signal with 7.1-dB peak-to-average power ratio was applied, an adjacent channel leakage ratio (ACLR) of -34.7 dBc with a DE of 51.8% was achieved at an average power of 33.2 dBm. After a digital pre-distortion process, the ACLR and DE were improved to -49.6 dBc and 52.7%, respectively.

Switching Behavior of Class-E Power Amplifier and Its Operation Above Maximum Frequency

The switching behavior of Class-E power amplifiers (PAs) is described. Although the zero voltage switching can be performed properly, the Cout charging process at the switch-off transition cannot be abrupt and the waveform deviates from the ideal shape, degrading the efficiency. For the operation above maximum frequency, the charging process should be even faster but it cannot follow. Moreover, the discharging process is not sufficiently fast and further degrades the efficiency. The discharging process is assisted by the bifurcated current at saturation. The performance of the Class-E PA above the maximum frequency is enhanced by the nonlinear Cout, which helps to shape the voltage waveform. The bifurcated current itself cannot generate enough of a second-harmonic voltage component to shape the required voltage waveform. The performance of the Class-E PA can be further improved by a second-harmonic tuning and a conjugate matched output load, leading to the saturated PA. Compared with the Class-E PA, the saturated amplifier delivers higher output power and efficiency. A highly efficient saturated amplifier is designed using a Cree GaN HEMT CGH40010 device at 3.5 GHz. It provides a drain efficiency of 75.8% at a saturated power of 40.2 dBm (10.5 W).