Yunsik Park

Accurate Offset Line Design of Doherty Amplifier With Compensation of Peaking Amplifier Phase Variation

Accurate offset line design of Doherty amplifier is investigated to compensate the phase variation of the carrier and peaking amplifiers. The offset line at the peaking amplifier not only blocks the power leakage to the peaking amplifier at the OFF-state, but also assists in the load modulation like the offset line at the carrier amplifier. However, with the conventional offset line, the load is not properly modulated due to the phase variation of the class C peaking amplifier. Since the offset lines at the carrier and peaking power amplifiers (PAs) properly eliminate the reactive parts during the Doherty load modulation, the offset lines can handle the phase variation also. To compensate the phase variation, additional lines are added at the carrier and peaking amplifiers for the proper load modulation. With the new offset line, the load of the peaking amplifier can be properly modulated and the efficiency at the high power region is increased. In addition, the efficiency at the low power region is also increased due to the larger load of the carrier amplifier at the power region. The enhanced performance is validated by the Doherty PA employing CGH40045 devices at 1.94 GHz, applying drain bias voltage of 50 V. For the long term evolution signal with a 6.5 dB peak-to-average power ratio, the Doherty amplifier with the new offset line delivers a drain/power-added efficiency of 57%/54.8% which is 3.5%/3.1% higher than that with the conventional offset line at an output power of 45.4 dBm with the linearity -48.3 dBc using digital predistortion linearization.

Highly Linear 2-Stage Doherty Power Amplifier Using GaN MMIC

A power amplifier (PA) for a femto-cell base station should be highly efficient, linear and small. The efficiency for amplification of a high peak-to-average power ratio (PAPR) signal was improved by designing an asymmetric Doherty PA (DPA). The linearity was improved by applying third-order inter-modulation (IM3) cancellation method. A small size is achieved by designing the DPA using GaN MMIC process. The implemented 2-stage DPA delivers a power-added efficiency (PAE) of 38.6% and a gain of 33.4 dB with an average power of 34.2 dBm for a 7.2 dB PAPR 10 MHz bandwidth LTE signal at 2.14 GHz.

Mitigating Phase Variation of Peaking Amplifier Using Offset Line

The effect of the peaking offset line on the Doherty amplifier operation is investigated. The peaking amplifier of the Doherty structure operates at a C-bias condition for the load modulation. With the C-bias, the amplifier has a poor AM-PM characteristic due to the nonlinear input/output capacitances. The nonlinear phase variation of the peaking amplifier influences the load modulation behavior and reduces efficiency of the Doherty amplifier at a high output power region. To mitigate the nonlinear PM characteristic of the peaking amplifier, the length of the peaking offset line should be reduced from the conventional offset line. To validate the offset line design, a 2-stage Doherty amplifier is implemented at 2.655 GHz using GaN pHEMT. Due to the proper load modulation, the Doherty PA delivers a very good performance. For the LTE signal with 20 MHz bandwidth and 7.2 dB peak-to-average power ratio (PAPR), the amplifier delivers a power-added efficiency (PAE) of 49.3% and gain of 25 dB at an average output power of 49 dBm.

GaN HEMT MMIC Doherty Power Amplifier With High Gain and High PAE

This paper presents an approach to maximize the gain and power-added efficiency (PAE) of a Doherty power amplifier (PA) using a 0.25 μm GaN pHEMT. The conventional carrier PA has an input matching for the ROPT load and does not deliver the 3 dB higher gain with 2ROPT load due to the mismatch and it degrades gain and PAE of the PA. To solve the problem, the input match of the carrier PA is optimized at the back-off power level with the 2ROPT output load, while the input is mismatched at a high power level. A Doherty PA with the concept is designed and implemented using a GaN pHEMT MMIC process at 1.8 GHz. The measured average output power, power-added efficiency and gain are 35.6 dBm, 56.3%, and 18.9 dB for a 10 MHz LTE signal with a 6.5 dB PAPR.

Analysis of Average Power Tracking Doherty Power Amplifier

An average power tracking (APT) Doherty power amplifier (PA) is analyzed in terms of its biasing voltage condition, efficiency, and output power. And the drain and gate bias voltages are optimized for operation at different output power conditions. The Doherty power amplifier is designed using 45 W gallium nitride (GaN) high electron mobility transistors (HEMT) for the carrier and peaking cells at 1.94 GHz. The bias voltages are controlled for each average power level(42.9 dBm, 39.9 dBm, 37 dBm). The measured drain efficiencies and gains are 53.2%, 12.8 dB at 42.9 dBm and 54.3%, 11.2 dB at 39.9 dBm and 53.4%, 9.1 dB at 37 dBm for a 10 MHz LTE signal with a 6.5 dB PAPR. This result demonstrates that the Doherty PA can be reconfigured for different average output powers using the bias voltage control method.

A highly linear dual-band Doherty power amplifier for femto-cell base stations

A power amplifier (PA) for a femto-cell base station should be highly efficient, linear and small. The efficiency for amplification of a high peak-to-average power ratio (PAPR) signal is improved by designing an asymmetric Doherty PA (DPA). The linearity is improved by applying third-order inter-modulation (IM3) cancellation method. For dual-band operation, a tunable switched capacitor is applied. A small size is achieved by designing the DPA using GaN MMIC process. The implemented dual-band DPA delivers a DE of 45.5/41.6%, ACLR of -35.6/-34.5 dBc, and a gain of 15.7/13.2 dB with an average output power of 35.3/33.7 dBm, respectively, for a 7.2 dB PAPR 10 MHz bandwidth LTE signal at 2.3 and 2.65 GHz.

Gate Bias Adaptation of Doherty Power Amplifier for High Efficiency and High Power

This letter presents an approach to maximize the output power and efficiency of a Doherty power amplifier (PA). The conventional carrier PA having 2ROPT match, used in a symmetric Doherty PA, does not deliver the saturated high efficiency at the 6 dB back-off power but at the 5.5 dB back-off power due to the knee voltage effect. To solve the problem, the gate biases of the carrier and peaking PAs are adapted. The gate bias voltage of the carrier PA is optimized for a higher peak output power, delivering a 3 dB larger peak power at ROPT match. That of the peaking PA is also optimized to have the same peak power of the carrier PA. A Doherty PA with the concept is designed using a 45 W gallium nitride (GaN) high electron mobility transistors (HEMT) for the carrier and peaking cells at 1.94 GHz. The measured average output power, drain/power-added efficiencies and gain are 44.35 dBm, 60.5/57.2%, and 12.75 dB for a 10 MHz long term evolution (LTE) signal with a 6.5 dB peak-to-average power ratio (PAPR).

Optimized Doherty power amplifier with a new offset line

This work proposes a new offset line of carrier PA for Doherty power amplifier (PA). The carrier PA of conventional Doherty PA (DPA) delivers lower efficiency at back-off output power than at peak output power due to the phase mismatch of the carrier offset line in implementation, because the efficiency at back-off power is very sensitive to the output impedance change. To solve the problem, a new offset line for the carrier PA is adopted optimizing the efficiency performance at back-off output power, while it maintains the output peak power. A Doherty PA with the concept is designed using 45 W gallium nitride (GaN) high electron mobility transistors (HEMT) for the carrier and peaking cells at 1.94 GHz. The measured average output power, drain/power-added efficiencies and gain are 43.6 dBm, 60.7/56.9%, and 12 dB for a 10MHz long term evolution (LTE) signal with a 6.5 dB peak-to-average power ratio (PAPR).

Broadband Saturated Power Amplifier With Harmonic Control Circuits

This letter presents a broadband saturated power amplifier (PA) using the harmonic control circuits for base station application. The saturated PA has advantages for broadband operation with high efficiency due to the large tolerance of the second harmonic tuning. However, it is difficult to simultaneously achieve the fundamental and second harmonic impedance matching across a wide bandwidth. To solve the problem, the harmonic control circuits are placed at the input and output of the devices die. These harmonic control circuits play a role of leading the second harmonic impedances to the optimum regions but are specially designed to be insensitive to the following fundamental matching circuit. The saturated PA with the harmonic control circuit is designed using a 120 W GaN device, achieving a high efficiency and wide bandwidth characteristics simultaneously. The measured output power, drain efficiency, and gain are at least 51.0 dBm, 71.0%, and 8.22 dB at the saturation across the 1.75 to 2.17 GHz (21% relative bandwidth) under pulse test (10% duty). This saturated PA also delivers good performances for long term evolution (LTE) and wideband code division multiple access (WCDMA) modulated signals at 1.85 and 2.14 GHz, respectively. These results show that the broadband saturated PA with the harmonic control circuit is suitable to wide bandwidth multimode/multiband applications.

A Highly Efficient Power Amplifier at 5.8 GHz Using Independent Harmonic Control

An optimal design of a highly efficient power amplifier (PA) is described using independent fundamental and second harmonic impedance control technique. In fabrication of a power amplifier, a tuning method is indispensable because the simulation models of the device and capacitor have some difference with the actual value. To achieve a high drain efficiency, the fundamental and harmonic impedances need to be accurately optimized. However, as the operating frequency is increased, the matching circuit becomes sensitive and it is difficult to realize the accurate optimum matching. To solve the problem, the matching circuit of the PA adopts the independent harmonic control circuit using the characteristic of a quarter-wavelength microstrip line. A power amplifier with the concept is designed and implemented using a Cree GaN HEMT CGH40035 at 5.8 GHz. The peak output power, drain efficiency and gain are 47.2 dBm, 70.2%, and 10.2 dB.