Shankar Ganapathysubramanian

Experimental Determination of Stress Distributions Under Electroless Nickel Bumps and Correlation to Numerical Models

This paper presents high-density arrays of 7 × 7 n- and p-type piezoresistive field effect transistor (piezo-FET)-based stress sensors realized with a pitch of 23 μm using a commercial complementary metal-oxide semiconductor (CMOS) technology. The sensor elements make it possible to extract the distribution of the in-plane normal stress difference σxx-σyy and the in-plane shear stress σxy under electroless nickel (eNi) bumps. For the first time, pre-deposition stress caused by openings in the passivation, stress induced by the eNi bump deposition, and stress redistribution during anneals between 50°C and 260°C are presented. Typical values of σxx-σyy of ±25 MPa are introduced by bump deposition. These values are further increased by up to 160% during anneals up to 260°C. The in situ monitoring of the mechanical stress redistribution during annealing and thermal cycling is studied. At the deposition temperature, the system is found to be almost stress free. The stress due to bump deposition is numerically modeled. The unknown adhesion strength between nickel bump and silicon nitride (SiN) passivation is taken into account using an adjustable Youngs modulus of SiN. For an optimized model, the correlation between measured and simulated spatial stress distributions is found to be high, while the magnitude of the stress values is underestimated in the model by about 35%.

Stress distribution under electroless nickel bumps extracted using arrays of 7×7 piezo-FETs

This paper presents CMOS-based, high density arrays of 7×7 n- and p-type piezoresistive field effect transistor (piezo-FET) based stress sensors with a pitch of 23 µm for extracting the distribution of the in-plane normal stress difference σ<inf>xx</inf> - σ<inf>yy</inf> and the in-plane shear stress σ<inf>xy</inf> under electroless Ni bumps. For the first time, pre-deposition stress caused by openings in the passivation, stress induced by the electroless Ni bump deposition, and stress redistributions during annealing processes between 50 °C and 200 °C are presented. Typical values of σ<inf>xx</inf> - σ<inf>yy</inf> = ±25 MPa are introduced by bump deposition. These values are further increased by up to 60% during annealing steps of up to 200 °C. The in-situ monitoring of the mechanical stress redistribution during an anneal at 115 °C shows a relaxation of the material compound by σ<inf>xx</inf> - σ<inf>yy</inf> = ±2.5 MPa over 180 min. The change of the stress components is found to be linear with temperature during thermal cycling resulting in an almost stress-free state at the deposition temperature.

A Review of First Level Interconnect Modeling Methodology

The paradigm shifts within the microelectronics industry, such as the introduction of highly fragile low-k dielectric films and the shift to lead-free solders, have introduced a host of highly localized thermo-mechanical packaging stress issues. One of these issues is the impact of packaging stresses on low-K inter-layer dielectric (ILD) materials in the die backend. With increasing design complexity, conventional numerical analysis methodologies are proving ineffective in providing a reasonable risk assessment and design improvement strategy. New design tools and methodologies are being aggressively developed for the accurate representation of localized regions of the interconnect and the substrate to determine the level of package-induced stress on the die backend. This paper reviews modeling methodologies particularly relating to ILD delamination and the continuing progression in developing further understanding of the failure mechanisms.

Stress Mapping Below Flip-Chip Bumps With High Spatial Resolution Using Piezoresistive CMOS Sensors

This paper presents a CMOS stress sensor chip including arrays of piezoresistive sensor elements with high spatial resolution sensitive to the in-plane stress components σxx – σyy and σxy , to the out-of-plane stress σxz and σyz , and to the normal stress sum σΣ = (σxx + σyy )/2 − σzz . For the first time, an application of novel vertical stress sensors is presented, measuring the mechanical stress distributions below electroless nickel (eNi) bumps subject to lateral shear forces and vertical compression. All measured stress values are linearly proportional to the applied forces. The vertical shear stress sensors resolve residual vertical shear stresses of up to 51 MPa in the shear experiments. An adjustable numerical model is established assuming two different Young’s moduli of silicon nitride (SiN) emulating the adhesion between the SiN and eNi. Qualitative agreement of the in-plane stress distributions between experiment and numerical simulation is found in the shear and compression experiments, while good correlation for σΣ is found only for temperature uncompensated stress values in the compression test. The modeling of the absolute values shows differences to the experimental data of about ±30%.Copyright

Exploring the Possibility of Approximating Viscoelastic Response of Underfill Materials Through the Use of Appropriate Linear-Elastic Material Models

Viscoelastic analysis for numerical modeling of IC assembly processes are generally non-linear and require extensive time and computational resources when compared to a linear elastic analysis. Experimental identification/approximation of the viscoelastic properties (in terms of the Prony series) of any polymeric material is also an exhaustive effort. These drawbacks in experimental procedures and modeling activities have forced us to explore the possibility of approximating viscoelastic response of a polymer with an appropriate linear-elastic model. This paper discusses the impact of different approximation methodologies for a viscoelastic material most commonly used in electronic packaging — the underfill material in flip-chip technology. The modeling methodologies discussed here include the use of long term modulus, short term modulus and other “effective” stiffness measures to approximate the response of underfills during assembly processes. The package response, from each of these models, has been compared to the package response from a linear viscoelastic analysis assuming underfill materials to behave as Maxwell solids. It has been observed that the short term modulus consistently over predicts the ILD (interlayer dielectric in the silicon backend) peel stress for various underfill materials. In addition, the paper also explores the existence of an “effective” stiffness that can be used in lieu of a full fledged viscoelastic analysis. The ability to estimate this “effective” stiffness using available temperature dependent modulus data (from DMA tests) is also discussed. The applicability of this effective metric to different underfill materials has also been explored. In conclusion, this study highlights the need for accurate characterization of polymeric materials so that numerical predictions can provide realistic risk assessments for future packaging technologies.Copyright