Shigezumi Matsui
Hitachi
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Publication
Featured researches published by Shigezumi Matsui.
international symposium on microarchitecture | 1993
Kunio Uchiyama; Fumio Arakawa; Susumu Narita; Hirokazu Aoki; Ikuya Kawasaki; Shigezumi Matsui; Mitsuyoshi Yamamoto; Norio Nakagawa; Ikuo Kudo
The Gmicro/500, which features a RISC-like dual-pipeline structure for high-speed execution of basic instructions and represents a significant advance for the TRON architecture, is presented. Upwardly-object-compatible with earlier members of the Gmicro series, this microprocessor uses resident dedicated branch buffers to greatly enhance branch instruction execution speed. Its microprograms simultaneously use dual execution blocks to execute high-level language instructions effectively. Fabricated with a 0.6- mu m CMOS technology on a 10.9-mm*16-mm die, the chip operates at 50/66 MHz and achieves a processing rate of 100/132 MIPS.<<ETX>>
Archive | 1995
Shigezumi Matsui; Mitsuyoshi Yamamoto; Shinichi Yoshioka; Susumu Narita; Ikuya Kawasaki; Susumu Kaneko; Kiyoshi Hasegawa
Archive | 1995
Shigezumi Matsui; Ikuya Kawasaki; Susumu Narita; Masato Nemoto
Archive | 2002
Masanao Yamaoka; Koichiro Ishibashi; Shigezumi Matsui; Kenichi Osada
Archive | 1995
Shinichi Yoshioka; Ikuya Kawasaki; Shigezumi Matsui; Susumu Narita
Archive | 1993
Hiroshi Takeda; Shigezumi Matsui
Archive | 1990
Satoshi Masuda; Ikuya Kawasaki; Shigezumi Matsui
Archive | 1988
Satoshi Masuda; Ikuya Kawasaki; Shigezumi Matsui
Archive | 2003
Shigezumi Matsui; Ikuya Kawasaki; Susumu Narita; Masato Nemoto
Archive | 1994
Shigezumi Matsui; Ikuya Kawasaki; Yoshiyuki Kondo; Kouji Hashimoto
