Shohei Shibuya

High-frequency low-distortion signal generation algorithm with arbitrary waveform generator

This paper describes analysis and simulation verification of a high-frequency low-distortion signal generation method with an arbitrary waveform generator (AWG). Our previously proposed phase-switching method was limited to low-distortion but low-frequency signal generation, and therefore it cannot be used directly for high-frequency signal generation. We propose here a method for generating a low-distortion high-frequency signal with an AWG (i.e., the frequency close to the Nyquist frequency of the AWG), and show its theoretical analysis and simulation results. With this proposed method, 3rd order harmonics of the generated signal are suppressed simply by changing the AWG program (or waveform memory contents) - AWG nonlinearity identification is not required - and spurious components, generated far from the signal band, are relatively easy to remove using an analog filter.

Timing measurement BOST with multi-bit delta-sigma TDC

This paper describes design and implementation of a multi-bit delta-sigma (ΔΣ) Time-to-Digital Converter (TDC) with Data-Weighted-Averaging (DWA) algorithm on analog FPGA. I/O interfacing circuits such as double-data-rate (DDR) memory interfaces are very important, and their low-cost, high-quality test is challenging. We propose here simple test circuitry for measuring digital signal timing of I/O interfacing circuits with high resolution and good accuracy. We focus on TDC applications of ΔΣmodulators (for fine-timing-resolution, digital output, and simple circuitry) and with multi-bit architecture (for short testing time). However, the multi-bit ΔΣ TDC suffers from delay mismatches among delay cells. Then we propose to apply the DWA algorithm for the delay cells in order to solve this problem. Our experimental results showed that the DWA algorithm improved the overall multi-bitΔΣ TDC linearity.

SAR ADC design using Golden ratio weight algorithm

This paper describes redundant successive approximation register (SAR) ADC design methods which enable high-reliability and high-speed AD conversion using digital error correction. Especially we propose to apply Fibonacci sequence and its property called Golden ratio to SAR ADC design to optimize redundant search algorithms. We present some interesting properties for well-balanced redundant SAR ADC design, as well as golden-ratio-weighted DAC topologies for its internal usage.

Fibonacci sequence weighted SAR ADC algorithm and its DAC topology

This paper describes redundant successive approximation register (SAR) ADC design methods to improve reliability and conversion speed by digital error correction. Especially we show that redundant SAR ADC using Fibonacci sequence and its property called Golden ratio can be well-balanced design. We also present some simple golden-ratio-weighted DAC topologies for easy realization of the redundant SAR ADC by utilizing many interesting properties of Fibonacci sequence.

A technique for dynamic range improvement of intermodulation distortion products for an Interpolating DAC-based Arbitrary Waveform Generator using a phase switching algorithm

This paper describes a phase switching algorithm for Interpolating Digital-to-Analog Converter (DAC) based Arbitrary Waveform Generators (AWG). This was possible by using the standard phase switching algorithm with the addition of simple phase offset and systematic phase difference adjustment; this was discovered by experimenting with suppression of the intermodulation distortion (IMD) components of a two-tone signal. In this case, we examine the 3rd, 5th and 7th order IMD tones and the effect of the phase switching algorithm and phase shift has on the AWG by measurement with a digitizer. Then we show what the effect of the developed two-tone phase switching technique has upon the performance measurement of a 16-bit Analog-to-Digital Converter (ADC). It is shown that using the original algorithm, no improvement could be achieved for the odd order IMD products. However, by using an even order suppression technique (another phase difference) with a phase shift, a suppression was achieved compared to the standard two-tone signal generation (without phase switching). We show how this technique allows the use of a low-cost tester resource to test IMD products with a higher dynamic range than was previously possible.

High-frequency low-distortion one-tone and two-tone signal generation using arbitrary waveform generator

This paper describes algorithms and simulation verification of low-distortion sinusoidal signal generation methods with harmonics and image cancellation using an arbitrary waveform generator. We show high-frequency sinusoidal signal generation algorithms with HD3 image cancellation, HD3 & HD5 images cancellation, and point out that even harmonics images (such as HD2 image) is not required because they are far from the signal frequency. Also we show high-frequency two-tone signal generation with IMD3 suppression. With these methods, distortion components close to the signal are suppressed simply by changing the DSP program—AWG nonlinearity identification is not required—and spurious components, generated far from the signal band, are relatively easy to remove using an analog filter.

Finite aperture time effects in sampling circuit

This paper presents analysis of sampling circuit for high-frequency and high-precision waveform acquisition. We have analyzed effects finite aperture time, and we have shown derived formula for the bandwidth limitation due to its low-pass filter effects. We have checked that our theoretical calculation and SPICE simulation results agree well. We also have focused on the trade-off among bandwidth, aperture time, and time constant, and we have derived their relationships as an extension of the uncertainty relationship between time and frequency; we believe that such analyses would be new in circuit design area.

A Distortion Shaping Technique to Equalize Intermodulation Distortion Performance of Interpolating Arbitrary Waveform Generators in Automated Test Equipment

This paper demonstrates a phase switching algorithm for Interpolating Digital-to-Analog Converter (DAC) based Arbitrary Waveform Generator (AWG) that resides in Automated Test Equipment (ATE) to test semiconductor devices. This confirms a previous exercise that was made by experiment with different Intermodulation Distortion (IMD) suppression techniques and starting phase shifts to suppress IMD tones of the AWG with the interpolating DAC. We show that the poor performance of the AWG can be improved by using the phase switching algorithm over the installed base of a company’s tester platform. It is also shown that the IMD performance of AWGs across a company’s tester installed base can be equalized, and how it can be achieved using the phase switching technique. We describe how the IMD specifications of the instrument are much worse than those actually measured, and by using phase switching, better performance can be achieved than what would be possible under normal conditions. We present how this technique allows the use of a low-cost tester resource to test IMD products of such as communication application ADCs with a higher dynamic range than what was previously possible.

Low-distortion signal generation for analog/mixed-signal circuit testing with digital ATE

This paper proposes low-distortion sinusoidal/two-tone signal generation techniques for analog/mixed-signal IC testing with a digital Automatic Test Equipment (ATE) using only single digital output pin. They provide a rectangular waveform approximated to a single-tone or two-tone with specified harmonics suppression; we can specify multiple harmonics to suppress using digital control, and it is followed by an analog LPF for smoothing. The proposed method is simple for implementation with modest performance, compared to a wide dynamic range delta-sigma DAC. Its configuration, principle, simulation as well as experimental results at the laboratory level are presented. Also its application, combined with a high-speed DAC for analog circuit testing is described.

Sine signal generation with specified multiple harmonics suppression

This paper proposes a sinusoidal signal generator algorithm and architecture for mixed-signal IC testing input as well as quadrature detection circuit applications. It can provide a rectangular waveform approximated to a single-tone signal with harmonics suppression; we can specify the harmonics to suppress using digital control. Its circuit consists of digital circuit, a 1-bit DA converter with an analog filter. Proposed method is simple for implementation with modest performance, compared to a wide dynamic range delta-sigma digital-to-analog converter (DAC) and other methods.