Shuichi Kudo

Low-resistive and homogenous NiPt-silicide formation using ultra-low temperature annealing with microwave system for 22nm-node CMOS and beyond

A novel NiPt-silicide formation using microwave annealing (MWA) is proposed, and superior properties of NiPt silicide in ultra-shallow junction (USJ) are demonstrated for the first time. MWA is suitable for the thin NiPtSi formation with its stable and ultra-low temperature (less than 250 °C) heating. The anomalous Ni diffusion during the NiPtSi formation is considered to be suppressed because MW system heats Si substrates selectively. As a result, low-resistive and homogeneous NiPtSi can be formed, and the increase of the junction leakage current due to the abnormal NiPt-silicide growth is successfully suppressed in USJ. This superior technique is quite promising for achieving 22nm-node CMOS and beyond.

Impact of additional Pt and NiSi crystal orientation on channel stress induced by Ni silicide film in metal?oxide?semiconductor field-effect transistors

The impact of additional Pt and Ni monosilicide (NiSi) crystal orientation on channel stress from Ni silicide in metal–oxide–semiconductor field-effect transistors (MOSFETs) has been demonstrated. The channel stress generation mechanism can be explained by the NiSi crystal orientation. In pure Ni silicide films, the channel stress in the p-type substrate is much larger than that in the n-type one, since the NiSi a-axis parallel to the channel direction is strongly aligned on the p-type substrate compared with on the n-type one. On the other hand, in NiPt silicide films, the difference in the channel stress between the p- and n-type substrates is small, because the NiSi crystal orientation on the p-type substrate is similar to that on the n-type one. These results can be explained by the Pt segregation at the interface between the NiSi film and the Si surface. Segregated Pt atoms cause the NiSi b-axis to align normal to the Si(001) surface in the nucleation step owing to the expansion of the NiSi lattice spacing at the NiSi/Si interface. Furthermore, the Pt segregation mechanism is considered to be caused by the grain boundary diffusion in the Ni2Si film during NiSi formation. We confirmed that the grains of Ni2Si on the p-type substrate are smaller than those on the n-type one. The Ni2Si film on the p-type substrate has more grain boundary diffusion paths than that on the n-type one. Therefore, the amount of Pt segregation at the NiSi/Si interface on the p-type substrate is larger than that on the n-type one. Consequently, the number of NiSi grains with the b-axis aligned normal to the Si(001) in the p-type substrate is larger than that in the n-type one. As a result, the channel stress induced by NiPt silicide in PMOS is larger than that in NMOS. According to this mechanism, controlling the Pt concentration at the NiSi/Si interface is one of the key factors for channel stress engineering.

Anomalous Nickel Silicide Encroachment in n-Channel Metal–Oxide–Semiconductor Field-Effect Transitors on Si(110) Substrates and Its Suppression by Si+ Ion-Implantation Technique

A novel low-leakage-current nickel self-aligned-silicide (SALICIDE) process in n-channel metal–oxide–semiconductor field-effect transistors (nMOSFETs) on Si(110) substrates is reported. Anomalous nickel silicide encroachment in the direction in nMOSFETs on Si(110) substrates is found for the first time. This encroachment causes anomalous off-state leakage current (Ioff) in nMOSFETs on Si(110) substrates. In particular, in the case of the channel on Si(110) substrates, Ni atoms easily diffuse in the direction, and nickel silicide preferentially grows in the direction. As a result, anomalous leakage current between the drain and the source occurs, and the leakage current seriously degrades transistor performance. In order to overcome these problems, we propose a method of suppressing anomalous Ioff on Si(110) substrates by Si+ ion-implantation technique prior to the nickel SALICIDE process. This method is effective for suppressing the encroachment of nickel silicide and realizing low-leakage complementary metal–oxide–semiconductor (CMOS) devices on Si(110) substrates.

Analysis of Channel Stress Induced by NiPt-Silicide in Metal–Oxide–Semiconductor Field-Effect Transistor and Its Generation Mechanism

Channel stress induced by NiPt-silicide films in metal–oxide–semiconductor field-effect transistors (MOSFETs) was demonstrated using UV-Raman spectroscopy, and its generation mechanism was revealed. It was possible to accurately measure the channel stress with the Raman test structure. The channel stress depends on the source/drain doping type and the second silicide annealing method. In order to discuss the channel stress generation mechanism, NiPt-silicide microstructure analyses were performed using X-ray diffraction analysis and scanning transmission electron microscopy. The channel stress generation mechanism can be elucidated by the following two factors: the change in the NiSi lattice spacing, which depends on the annealing temperature, and the NiSi crystal orientation. The analyses of these factors are important for controlling channel stress in stress engineering for high-performance transistors.

A Novel Low Leakage-Current Ni SALICIDE Process in nMOSFETs on Si(110) Substrate

A novel low leakage-current Ni SALICIDE process in nMOSFETs on Si(110) is proposed. It is found for the first time that the anomalous off-state leakage-current (Ioff) in nMOSFETs on Si(110) is caused due to the inherent Ni silicide encroachment toward the channel region. Especially, <110> channel on Si(110) has fatal defect for CMOS fabrication. We propose two methods to suppress the anomalous Ioff, the creative ingenuity of design layout within SRAM and Si ion implantation (Si I.I.) technique. These two methods are quite effective to realize high performance and low cost CMOS devices on Si(110).

Analysis of Junction Leakage Current Failure of Nickel Silicide Abnormal Growth Using Advanced Transmission Electron Microscopy

This is the first paper to reveal the formation mechanism of the abnormal growth of nickel silicide that causes leakage-current failure in complementary metal-oxide- semiconductor (CMOS) devices by using advanced transmission electron microscope (TEM) techniques: electron tomography and spatially-resolved electron energy-loss spectroscopy (EELS). We reveal that the abnormal growth of Ni silicide results in a single crystal of NiSi2 and that it grows toward Si <;110> directions along (111) planes with the Ni diffusion through the silicon interstitial sites. In addition, we confirm that the abnormal growth is related to crystal microstructure and crystal defects. These detailed analyses are essential to understand the formation mechanism of abnormal growths of Ni silicide.

Three-Dimensional Visualization Technique for Crystal Defects in High Performance p-Channel Metal–Oxide–Semiconductor Field-Effect Transistors with Embedded SiGe Source/Drain

We have performed a detailed analysis of crystal defects in high-performance p-channel metal–oxide–semiconductor field-effect transistors (pMOSFETs) with embedded SiGe source/drain (S/D), using low-angle annular dark field (ADF) scanning transmission electron microscopy (STEM) and electron tomography. We achieved successful results in three-dimensional visualization of crystal defects for the first time. Consequently, we have discussed about the three-dimensional physical geometric relationship between crystal defects and device architecture. This approach is sure to contribute to the development of advanced complementary metal–oxide–semiconductor (CMOS) devices using strained silicon technology.

Impact of carbon co-implantation on boron distribution and activation in silicon studied by atom probe tomography and spreading resistance measurements

The impact of carbon (C) co-implantation on boron (B) activation in crystalline silicon was investigated. The detailed distribution of B and C atoms and B activation ratios dependent on the C ion-implantation energies were examined based on three-dimensional spatial mappings of B and C obtained by atom probe tomography and from depth profiles of their concentrations from secondary ion mass spectrometry and depth profiles of carrier concentrations with spreading resistance measurements. At all C implantation energies (8, 15, and 30 keV), B out-diffusion during activation annealing was reduced, so that more B atoms were observed in the C co-implanted samples. The carrier concentration was decreased throughout the entire implanted region for C implantation energies of 15 and 30 keV, although it was only increased at greater depths for C co-implantation at 8 keV. Two different effects of C co-implantation, (I) reduction of B out-diffusion and (II) influence of B activation, were confirmed.

Study of formation mechanism of nickel silicide discontinuities in high performance CMOS devices

We performed detailed analysis of Ni silicide discontinuities induced by agglomeration that causes the increasing electric resistance in high-performance CMOS devices by using advanced physical analysis techniques. We confirmed that the agglomeration of the Ni silicide is related to elongated-triangular- shaped-splits — which we call delta-shaped-splits — which cause discontinuities that occur at small-angle grain boundaries pinned by boron clusters even with small stress. We successfully determined the formation mechanism of the Ni silicide discontinuities in detail. It is essential to develop a highly reliable Ni salicide process, especially for 45 nm node high performance devices and beyond.

Analysis of Ni silicide abnormal growth mechanism using advanced TEM techniques

We performed detailed analysis of the abnormal growth of Ni silicide that causes leakage-current failure in CMOS devices. We investigated the three-dimensional shape and the crystal microstructure of the abnormal growth by using advanced transmission electron microscope (TEM) techniques: electron tomography and spatially-resolved electron energy-loss spectroscopy (EELS). Furthermore, we revealed that the abnormal growth is related to crystal microstructure and crystal defects. This detailed information is important in the mechanism elucidation of abnormal growth of Ni silicide. To develop a highly reliable Ni salicide process, it is essential to understand the failure mechanism of abnormal growths of Ni silicide, especially for 45 nm node devices and beyond. To conclude, we discuss the solutions for the development of a successful Ni salicide process.