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Featured researches published by Shunji Maeda.


workshop on applications of computer vision | 1994

Precise visual inspection for LSI wafer patterns using subpixel image alignment

Takashi Hiroi; Shunji Maeda; Hitoshi Kubota; Kenji Watanabe; Yasuo Nakagawa

This paper reports on an image processing algorithm and hardware for fast, precise inspection of LSI wafer patterns. In order to detect deep sub-micron defects such as 0.2 /spl mu/m at high speed by grayscale image comparison, we must overcome the sampling errors that inevitably occur between two images during detection. For this purpose, we have developed a subpixel image alignment algorithm that infers the correct sampling position and creates the two resampled images with subpixel accuracy. We have also developed an 8-channel pipelined processor with gate arrays. It has 8/spl times/19,000 gates and can operate at 8/spl times/15 MHz. Evaluation of the system confirmed that the accuracy of the subpixel image alignment was 0.16 pixels or less and that the inspection system could detect 0.18 /spl mu/m defects at a pixel size of 0.25 /spl mu/m for half-micron LSI wafer patterns with an inspection speed of 25 s/cm/sup 2/.<<ETX>>


Systems and Computers in Japan | 1990

Automated visual inspection for lsi water multilayer patterns by cascade pattern matching algorithm

Shunji Maeda; Hitoshi Kubota; Hiroshi Makihira; Takanori Ninomiya; Nonmember Yasuo Nakagawa; Nonmember Yuzo Taniguchi

This paper reports on the defect detection algorithm for the LSI wafer multilayer patterns, together with the result of evaluation. The multilayer patterns are constructed by the exposure after alignment between the wafer pattern and the reticle pattern for each chip. Consequently, the position relation between layers is different even for adjacent chips (interlayer registration error). The developed algorithm compares the gray-level images of adjacent chips on the wafer and extracts the defect without being affected by the inter-layer registration error. First, the pattern edge is extracted from the gray-level image, and the position alignment is executed using the edges. Then, by eliminating the region where gray levels are equal, the regions are extracted for which the position alignment is unsatisfactory. The position alignment is attempted again for that region. This procedure is iterated. When the unmatched region of the pattern edge is sufficiently small, it is decided that the interlayer registration error is absorbed, and the unmatched region is extracted as the defect. An automatic visual inspection system was constructed and evaluated experimentally. As a result, it was verified that the whole chip area can be inspected, and the defect of 0.5 μm or more can be detected in a stable way.


IWSM. 1998 3rd International Workshop on Statistical Metrology (Cat. No.98EX113) | 1998

Defect control using an automatic killer defect selection method

Yasuhiro Yoshitake; Shunji Maeda; Kenji Watanabe

In LSI mass production lines, it is very important to improve the detection accuracy of fatal excursions in defect trend charts in order to ramp up quickly and maintain good yield. It is for this reason that killer defects which could cause device faults should be monitored. We have developed an automatic killer defect selection (AKIDS) method to assist and improve the accuracy of this process. This method judges defects as killer or nonkiller by comparing defect sizes against killer defect judgement criteria. We applied AKIDS in the defect QC and sampling review processes, and found it to be effective in both detecting fatal excursions and selecting good review points for identifying the source of device faults.


Proceedings of SPIE | 1991

Automated visual inspection for LSI wafer patterns using a derivative-polarity comparison algorithm

Shunji Maeda; Takashi Hiroi; Hiroshi Makihira; Hitoshi Kubota

Algorithms for visual inspection of LSI wafer multilayer patterns have been developed. These algorithms compare corresponding images of two dies on a wafer. In this paper, two algorithms are proposed. The derivative-polarity comparison algorithm compares the polarities of the first derivatives of two images, and recognizes the regions whose polarities are not matched as positional discrepancies (defects), in order to cope with gray-scale differences caused by pattern thickness errors. The multiple-displacement pattern matching algorithm executes the above polarity comparisons at several positions with images suitably aligned, and determines the common unmatched regions as defective, in order to handle the interlayer- registration errors encountered with multilayer patterns. These algorithms were evaluated experimentally, and it was verified that defects of 0.3 micrometers or more can be reliably detected in multilayer patterns by combining these algorithms.


Systems and Computers in Japan | 1996

Optimum threshold generation for automated visual inspection of large‐scale integration wafer patterns

Shunji Maeda; Hitoshi Kubota; Hiroshi Makihira

The authors have developed a submicron-level defect detection method that avoids the unnecessary detection of grains produced by some layers. As part of an automated visual inspection system for Large-Scale Integration wafer multilayer patterns, the developed method can detect defects reliably by automatically generating an optimum threshold for each pattern according to the occurrence of grains in each area of the pattern, and then binarizing the subtracted grayscale images with the threshold. This method is used in comparison inspections of periodic cell patterns in the same die. This can be realized without using design pattern and process information. This paper proposes an edge-preserving grain-noise smoothing algorithm that generates a uniform threshold for each region surrounded by the pattern edges according to the grains detected using the multiple cell patterns to be inspected. It is confirmed through experiments with actual LSI wafers that defects on the order of 0.5 μm and greater, which exist at pattern edges and in the regions having no grains, can be detected stably without the unnecessary detection of grains, even with grain sizes on the order of 1 ∼ 1.3 μm in some layers.


international conference on advanced intelligent mechatronics | 2012

Robust 3-D reconstruction from single camera rotation stereo

Hiroyuki Kayaba; Shun'ichi Kaneko; Atsushi Taniguchi; Kaoru Sakai; Shunji Maeda

We proposed a high accuracy measurement system for free shape objects using a single camera rotation stereo method. The aim is to allow inspection of small defects by a defect inspection system. Our proposed method measures the panoramic image of an object while rotating it, and estimates the 3D coordinate values (XYZ) from a single camera rotation system. Moreover, we apply an M-estimator which has a robustness for noise and solves the stereo correspondence problem under geometric constraints. Experimental results for real and simulation data show that the proposed method is effective as noise can be eliminated. The proposed method can also reconstruct objects.


Journal of The Japan Society for Precision Engineering | 2000

A Proposal of Stage Motion Measurement Method Using Image Analysis.

Shunji Maeda; Minoru Yoshida; Kenji Oka

A method of measuring the motion of a stage has been developed based on a Thru The Lens optics system. Images of the target, which has line & space patterns written on a Si wafer, are detected through the lens by a linear image sensor, which is synchronized with the output of the position sensor of the scanning stage. The displacement from the ideal orbit is measured by an image analysis method. This method has a fixed measuring point in contrast with the moving measuring point of a laser interferometer system, and the method is optimum for laser processing systems and LSI wafer inspection systems. Its accuracy was evaluated to be 10 nm p-p.


Systems and Computers in Japan | 1998

Threshold setting assisted by numerical analysis methods in automatic visual inspection using gray‐scale image comparison

Shunji Maeda; Fumiaki Endo; Hiroshi Makihira; Hitoshi Kubota

A method is proposed to support fast product-specific threshold setting in case of inspection by comparison of gray-scale images. With the proposed method, emphasis is laid on false alarms (false recognition of normal parts as defects), and the optimal threshold is set as the minimum value to keep the false alarm rate within acceptable limits. The proposed procedure of threshold setting consists of three stages, namely, calculation of initial threshold, preliminary inspection/review, and threshold correction. In initial threshold calculation and threshold correction, fast threshold renewal is obtained by numerical analysis, specifically, by successive approximations. The proposed method was applied to an actual device for visual inspection of LSI wafer patterns and proved to offer fast and efficient threshold setting. Thus, the threshold now can be set efficiently for specific products in an LSI production line, ensuring adequate feedback at a low false alarm rate. This implies flexible inspection in multi-item production with prompt adjustment to new products.


Archive | 2002

Method and apparatus for inspecting pattern defects

Kaoru Sakai; Shunji Maeda; Takafumi Okabe


Archive | 2009

Defect inspection method and apparatus

Shunji Maeda; Kenji Oka; Yukihiro Shibata; Minoru Yoshida; Chie Shishido; Yuji Takagi; Atsushi Yoshida; Kazuo Yamaguchi

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