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Dive into the research topics where Swapan K. Bhattacharya is active.

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Featured researches published by Swapan K. Bhattacharya.


Journal of Materials Science: Materials in Electronics | 2000

Next generation integral passives: materials, processes, and integration of resistors and capacitors on PWB substrates

Swapan K. Bhattacharya; Rao Tummala

Integral passives are becoming increasingly important in realizing next generation electronics industry needs through gradual replacement of discretes. The need for integral passives emerges from the increasing consumer demand for product miniaturization thus requiring components to be smaller and packaging to be space efficient. In this paper, the feasibility of integration of polymer/ceramic thin film (∼5 μm thick) capacitors (C) with other passive components such as resistors (R) and inductors (L) has been discussed. An integrated RC network requiring relatively large capacitance and resistance is selected as a model for co-integration of R and C components using low temperature PWB compatible fabrication processes. This test vehicle is a subset of a large electrical circuit of a functional medical device. In order to produce higher capacitance density and reduce in-plane device area, multi-layer (currently two-layer) capacitors are stacked in the thickness direction. A commercially available Ohmega-Ply resistor/conductor material is selected for integral resistors. Resistors were fabricated using a multi-step lithography process with the utilization of two separate masks. Bottom copper electrodes for capacitors were also defined during the resistor fabrication process. Photodefinable epoxies filled with a high permittivity ceramic powder were used for fabrication of thin film capacitors. Epoxy and ceramic powders were mixed in the required proportion and blended using a high shear apparatus. The coating solution was homogenized in a roll miller for 3 to 5 days prior to casting in order to prevent settling of the higher density ceramic particles. Capacitors were fabricated by spin-coating on the sub-etched copper electrodes. The deposited dielectric layers were dried, exposed with UV radiation, patterned, and thermally cured. Top capacitor electrodes (copper) were deposited using a metal or an e-beam evaporator. The electrodes were patterned using the standard photolithography processes. Selected good samples were used for depositing the second capacitor layer. The RC network is extended to incorporate electroplated polymer/ferrite core micro-inductors through the fabrication of an industry prototype low pass RLC filter. Meniscus coating was evaluated for large area manufacturing with high process yield. A capacitance density of ∼3 nF cm−2 was obtained on a single layer capacitor with ∼6 μm thick films. The capacitance density was increased to ∼6 nF cm−2 with the two-layer deposition process. The capacitors were relatively stable up to a frequency range of 120 Hz to 100 KHz. Meniscus coating was qualified to be a viable manufacturable method for depositing polymer/ceramic capacitors on large area (300mm x 300mm) PWB substrates. Dielectric constant values in the range of 3.5 to 35 with increase in filler loading up to 45 vol% were achieved in the epoxy nanocomposite system where the dielectric constant of the host polymer was limited to ∼3.5. Higher dielectric constant polymers are required to meet the increasingly higher capacitance needs for the next generation electronics packaging. Possible avenues for achieving higher capacitance density in polymer/ceramic nanocomposite system have been discussed.


IEEE Transactions on Advanced Packaging | 2004

The SOP for miniaturized, mixed-signal computing, communication, and consumer systems of the next decade

Rao R. Tummala; Madhavan Swaminathan; Manos M. Tentzeris; Joy Laskar; Gee-Kung Chang; Suresh K. Sitaraman; David C. Keezer; Daniel Guidotti; Zhaoran Huang; Kyutae Lim; Lixi Wan; Swapan K. Bhattacharya; Venky Sundaram; Fuhan Liu; P.M. Raj

From cell phones to biomedical systems, modern life is inexorably dependent on the complex convergence of technologies into stand-alone products designed to provide a complete solution in small, highly integrated systems with computing, communication, biomedical and consumer functions. The concept of system-on-package (SOP) originated in the mid-1990s at the NSF-funded Packaging Research Center at the Georgia Institute of Technology. This can be thought of as a conceptual paradigm in which the package, and not the bulky board, as the system and the package provides all the system functions in one single module, not as an assemblage of discrete components to be connected together, but as a continuous merging of various integrated thin film technologies in a small package. In the SOP concept, this is accomplished by codesign and fabrication of digital, optical, RF and sensor functions in both IC and the package, thus distinguishing between what function is accomplished best at IC level and at package level. In this paradigm, ICs are viewed as being best for transistor density while the package is viewed as being best for RF, optical and certain digital-function integration. The SOP concept is demonstrated for a conceptual broad-band system called an intelligent network communicator (INC). Its testbed acts as both a leading-edge research and teaching platform in which students, faculty, research scientists, and member companies evaluate the validity of SOP technology from design to fabrication to integration, test, cost and reliability. The testbed explores optical bit stream switching up to 100 GHz, digital signals up to 5-20 GHz, decoupling capacitor integration concepts to reduce simultaneous switching noise of power beyond 100 W/chip, design, modeling and fabrication of embedded components for RF, microwave, and millimeter wave applications up to 60 GHz. This article reviews a number of SOP technologies which have been developed and integrated into SOP test bed. These are: 1) convergent SOP-based INC system design and architecture, 2) digital SOP and its fabrication for signal and power integrity, 3) optical SOP fabrication with embedded actives and passives, 4) RF SOP for high Q-embedded inductors, filters and other RF components, 5) mixed signal electrical test, 6) mixed signal reliability, and 7) demonstration of SOP by INC prototype system.


international symposium on advanced packaging materials processes properties and interfaces | 2001

Colloidal processing of polymer ceramic nanocomposites for integral capacitors

Hitesh Windlass; P.M. Raj; Devarajan Balaraman; Swapan K. Bhattacharya; Rao Tummala

Polymer ceramic composites form a suitable material system for low temperature fabrication of embedded capacitors appropriate for the MCM-L technology. Improved electrical properties such as permittivity can be achieved by efficient filling of polymers with high dielectric constant ceramic powders such as lead magnesium niobate-lead titanate (PMN-PT) and barium titanate (BT). Photodefinable epoxies as the matrix polymer allow fine feature definition of the capacitor elements by conventional lithography techniques. The optimum weight percent of dispersant is tuned by monitoring the viscosity of the suspension. The dispersion mechanism (steric and electrostatic contribution) in a slightly polar solvent such as propylene glycol methyl ether acetate (PGMEA) is investigated from electrophoretic measurements. A high positive zeta potential is observed in the suspension, which suggests a strong contribution of electrostatic stabilization. By optimizing the particle packing using a bimodal distribution and modified processing methodology, a dielectric constant greater than 135 was achieved in PMN-PT/epoxy system. Suspensions are made with the lowest PGMEA content to ensure the efficiency of the dispersion and efficient particle packing in the dried film. Improved colloidal processing of nanoparticle-filled epoxy is a promising method to obtain ultra-thin capacitor films (<2/spl mu/m) with high capacitance density and improved yield. Capacitance of 35 nF/cm/sup 2/ was achieved with the thinnest films (2.5-3.0 /spl mu/m).


IEEE Transactions on Advanced Packaging | 2003

Polymer-ceramic nanocomposite capacitors for system-on-package (SOP) applications

Hitesh Windlass; P. Markondeya Raj; Devarajan Balaraman; Swapan K. Bhattacharya; Rao Tummala

This work focuses on optimizing the dispersion of nanosized ceramic particles for achieving higher dielectric constant, thereby higher capacitance density in polymer/ceramic nanocomposites. It has been observed that high solids loading leads to entrapment of porosity in the microstructure which lowers the effective dielectric constant of the films. The amount of solvent in the suspension and the speed at which spin coating was performed were found to impact the dielectric constant of high filler content nanocomposites. The interplay between the rheological properties of the suspension and processing parameters such as solvent content and coating speeds and its impact on the dielectric properties of the film are discussed. Porosity of thin film composites was measured for the first time to study the impact of these processing parameters. Powders of different particle sizes were mixed to obtain bimodal particle size distribution in order to increase the packing density of the composite. Packing density was improved by modifying the dispersion methodology. A nanocomposite with dielectric constant as high as 135 was obtained for the first time in the low-cost printed wiring board compatible epoxy system. A capacitance densities of /spl sim/35 nF/cm/sup 2/ on a nominal 3.5 micrometer films was achieved on PWB substrates with high yield. The manufacturability of these formulated nanocomposites and their applications as decoupling capacitors have been tested using a large area (300 mm /spl times/ 300 mm) system-on-package (SOP) chip-to-chip communication test vehicle.


international microwave symposium | 2002

Low-cost low actuation voltage copper RF MEMS switches

Devarajan Balaraman; Swapan K. Bhattacharya; Farrokh Ayazi; John Papapolymerou

This paper presents the design, fabrication and testing of capacitive copper RF MEMS switches with various hinge geometries, fabricated on high-resistivity silicon substrates. The switches were fabricated using a simple low-cost four-mask process and 0.6-1.0 /spl mu/m thick membranes were made out of sputtered copper. The capacitive airgap in between the membrane and the signal line is 1.5-2.0 /spl mu/m. The lowest actuation voltage measured on the fabricated switches is 9 V. The measured insertion loss of a fabricated switch and its associated transmission time was 0.9 dB (mainly contributed by the transmission line itself) and the isolation was measured to be 25 dB at 40 GHz.


ieee antennas and propagation society international symposium | 2007

Liquid Crystal Polymer (LCP): The ultimate solution for low-cost RF flexible electronics and antennas

Rushi Vyas; Amin Rida; Swapan K. Bhattacharya; Manos M. Tentzeris

In this paper, solutions for developing low cost electronics for antenna transceivers that take advantage of the stable electrical properties of the organic substrate liquid crystal polymer (LCP) has been presented. Three important ingredients in RF wireless transceivers namely embedded passives, a dual band filter and a RFid antenna have been designed and fabricated on LCP. Test results of all 3 of the structures show good agreement between the simulated and measured results over their respective bandwidths, demonstrating stable performance of the LCP substrate.


international microwave symposium | 2002

Design of inductors in organic substrates for 1-3 GHz wireless applications

Sidharth Dalmia; Farrokh Ayazi; Madhavan Swaminathan; Sung Hwan Min; Seock Hee Lee; Woopoung Kim; Dongsu Kim; Swapan K. Bhattacharya; Venky Sundaram; George White; Rao Tummala

High Q inductors with maximum quality factors in the range of 180-60 have been obtained at frequencies in the 1-3 GHz band for inductances in the range of 1 nH to 20 nH using a low-temperature organic laminate build-up process. This is the first time such high Q inductors have been demonstrated in this technology. The different inductor designs, optimization schemes, and trade-offs between different topologies, have been discussed in this paper.


international symposium on advanced packaging materials | 2002

Liquid crystal polymers (LCP) for high performance SOP applications

Kellee Brownlee; Swapan K. Bhattacharya; K. Shinotani; C. P. Wong; Rao Tummala

Electronic devices will increasingly rely on new materials with improved properties such as lower coefficient of thermal expansion preferably close to silicon, higher modulus, lower permittivity & loss, lower moisture absorption, better thermal conductivity, good dimensional stability, and more importantly reduced warpage particularly after the build-up process. The thermal properties of LCPs have led to increasing interest for the packaging community. This work deals with the evaluation of LCPs for future electronic packaging applications. LCP samples obtained from industry were analyzed using TA instruments. The samples with the properties best matched to the needs of future electronic packaging applications will be chosen based on the thermal analysis data presented for (i) fabrication of a base substrate using solely reinforced LCP, (ii) evaluating LCP for use as a carrier film, (iii) performing laser ablation techniques for via formation in the build up layers, and (iv) plating of the vias and the films for through hole Z-direction connections and X, Y, signal lines. In the present work, application of LCP as a dielectric layer for the system-on-package process has been evaluated. It is expected that the reinforced LCP films can also be utilized as a substrate material thereby providing the unique opportunity for superior compatibility between the substrate and the dielectric layer.


european microwave conference | 2007

Design and integration of inkjet-printed paper-based UHF components for RFID and ubiquitous sensing applications

Amin Rida; Li Yang; Rushi Vyas; Swapan K. Bhattacharya; Manos M. Tentzeris

Paper is one of the best substrate candidates for radio frequency identification (RFID) and ubiquitous sensing applications due to the fact that it is not only one of the lowest cost materials, but is environmentally friendly and can be easily used for mass reel-to-reel processing. In this paper, the UHF/RF electrical characterization of the paper substrate, using the microstrip ring resonator method, has been performed yielding an accurate low-value range for the dielectric constant (epsivr) and loss tangent (tandelta). A UHF RFID antenna is designed and inkjet printed on paper to demonstrate the applicability of this material. The presented approach could potentially set the foundation for very large ultra-low-cost ad-hoc networks for cognitive radio and sensing applications.


IEEE Transactions on Antennas and Propagation | 2011

A Lightweight Organic X-Band Active Receiving Phased Array With Integrated SiGe Amplifiers and Phase Shifters

Chad E. Patterson; Tushar K. Thrivikraman; Ana M. Yepes; Sean M. Begley; Swapan K. Bhattacharya; John D. Cressler; John Papapolymerou

This paper presents for the first time an X-band antenna array with integrated silicon germanium low noise amplifiers (LNA) and 3-bit phase shifters (PS). LNAs and PSs were successfully integrated onto an 8 × 2 lightweight antenna utilizing a multilayer liquid crystal polymer (LCP) feed substrate laminated with a duroid antenna layer. A baseline passive 8×2 antenna is measured along with a SiGe integrated 8×2 receive antenna for comparison of results. The active antenna array weighs only 3.5 ounces and consumes 53 mW of dc power. Successful comparisons of the measured and simulated results verify a working phased array with a return loss better than 10 dB across the frequency band of 9.25 GHz-9.75 GHz. A comparison of radiation patterns for the 8×2 baseline antenna and the 8×2 SiGe integrated antenna show a 25 dB increase in gain (ΔG). The SiGe integrated antenna demonstrated a predictable beam steering capability of ±41°. Combined antenna and receiver performance yielded a merit G/T of -9.1 dB/K and noise figure of 5.6 dB.

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Rao Tummala

Georgia Institute of Technology

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Madhavan Swaminathan

Georgia Institute of Technology

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Devarajan Balaraman

Georgia Institute of Technology

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P. Markondeya Raj

Georgia Institute of Technology

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P.M. Raj

Georgia Institute of Technology

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Venky Sundaram

Georgia Institute of Technology

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I.R. Abothu

Georgia Institute of Technology

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Lixi Wan

Georgia Institute of Technology

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Manos M. Tentzeris

Georgia Institute of Technology

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