Silvia Lenci

Record Breakdown Voltage (2200 V) of GaN DHFETs on Si With 2-

In this letter, we present a local substrate removal technology (under the source-to-drain region), reminiscent of through-silicon vias and report on the highest ever achieved breakdown voltage (V_BD) of AlGaN/GaN/AlGaN double heterostructure FETs on a Si (111) substrate with only 2-μm-thick AlGaN buffer. Before local Si removal, V_BD saturates at ~700 V at a gate-drain distance (L_GD) ≥ 8 μm. However, after etching away the substrate locally, we measure a record V_BD of 2200 V for the devices with L_GD = 20 μm. Moreover, from Hall measurements, we conclude that the local substrate removal integration approach has no impact on the 2-D electron gas channel properties.

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High-performance AlGaN/GaN diodes are realized on 8-in Si wafers with Au-free CMOS-compatible technology. The diodes are cointegrated on the same substrate together with the AlGaN/GaN metal-insulator-semiconductor high electron mobility transistors and with only one extra lithographic step. The diode anode and the transistor gate are processed together and the same metallization is used for both, avoiding extra metal deposition dedicated to the Schottky junction. A gated edge termination allows obtaining low reverse leakage current (within 1 μA/mm at -600 V), which is several orders of magnitude lower than the one of conventional Schottky diodes processed on the same wafer. Recess is implemented at the anode, resulting in low diode turn-on voltage values.

Buffer Thickness by Local Substrate Removal

In this paper, a further leakage reduction of AlGaN/GaN Schottky barrier diodes with gated edge termination (GET-SBDs) has been achieved by optimizing the physical vapor deposited TiN as the anode metal without severe degradation of ON-state characteristics. The optimized GET-SBD multifinger power diodes with 10 mm anode width deliver ~4 A at 2 V and show a median leakage of 1.3 μA at 25 °C and 3.8 μA at 150 °C measured at a reverse voltage of -200 V. The temperature-dependent leakage of Si, SiC, and our GaN power diodes has been compared. The breakdown voltage (BV) of GET-SBDs was evaluated by the variation of anode-to-cathode spacing (LAC) and the length of field plate. We observed a saturated BV of ~600 V for the GET-SBDs with LAC larger than 5 μm. The GET-SBD breakdown mechanism is shown to be determined by the parasitic vertical leakage current through the 2.8 μm-thick buffer layers measured with a grounding substrate. Furthermore, we show that the forward voltage of GET-SBDs can be improved by shrinking the lateral dimension of the edge termination due to reduced series resistance. The leakage current shows no dependence on the layout dimension LG (from 2 to 0.75 μm) and remains at a value of ~10 nA/mm. The optimized Au-free GET-SBD with low leakage current and improved forward voltage competes with high-performance lateral AlGaN/GaN SBDs reported in the literature.

Au-Free AlGaN/GaN Power Diode on 8-in Si Substrate With Gated Edge Termination

This paper presents a combined technique of high voltage off-state stress and current transient measurements to investigate the trapping/de-trapping characteristics of Au-free AlGaN/GaN Schottky barrier diodes. The device features a symmetric three-terminal structure with a central anode contact surrounded by two separate cathodes. Under the diode off-state stress conditions, the two separate cathodes were electrically shorted. The de-trapping dynamics was studied by monitoring the recovery of the two-dimensional electron gas (2DEG) current at different temperatures by applying 0.5 V at cathode 2 while grounding cathode 1. During the recovery, the anode contact acts as a sensor of changes in diode leakage current. This leakage variation was found to be mainly due to the barrier height variation. With this method, the energy level and capture cross section of different traps in the AlGaN/GaN Schottky barrier diode can be extracted. Furthermore, the physical location of different trapping phenomena is indic...

Performance Optimization of Au-Free Lateral AlGaN/GaN Schottky Barrier Diode With Gated Edge Termination on 200-mm Silicon Substrate

In this letter, we identified a dominant buffer trapping causing a bias-dependent dynamic RON for AlGaN/GaN Schottky barrier diodes (SBDs) fabricated on a C-doped AlGaN buffer as back-barrier. Current transient measurements at various temperatures were performed simultaneously on an AlGaN/GaN SBD and a transmission line model (TLM) structure based on the AlGaN/GaN heterojunction. During the stress of the TLM structure, the two Ohmic contacts are biased at the same voltage forming an equipotential surface while creating a uniform vertical electrical field to induce buffer trapping. We extracted the same dominant trap level of EC - 0.60 eV from the current transient spectroscopy on both the AlGaN/GaN SBD and the TLM structure after stressing at -100 V, indicating that the increase in the dynamic RON of the diode is due to the electron trapping in the buffer layers. More electron filling of this buffer trap occurs at higher stressing voltages (from -50 to -200 V), which reflects in an enhanced current-transient amplitude at the same time-constant under higher stressing voltages.

Current transient spectroscopy for trapping analysis on Au-free AlGaN/GaN Schottky barrier diode

We report on the first measurement results to obtain over 2 kV breakdown voltage (VBD) of GaN-DHFETs on Si substrates by etching a Si Trench Around Drain contacts (STAD). Similar devices without trenches show VBD of only 650 V. DHFETs fabricated with STAD technology show excellent thermal performance confirmed by electrical measurements and finite element thermal simulations. We observe lower buffer leakage at high temperature (100°C) after STAD compared to devices with Si substrate, enabling high temperature device operation.

On the Identification of Buffer Trapping for Bias-Dependent Dynamic

Dynamic characterization (Pulsed I–V) on Au-free AlGaN/GaN Schottky Barrier Diodes (SBDs) has been performed to evaluate the impact of negative quiescent biases on the forward characteristics. Results show an increase of on-resistance when more negative quiescent biases are applied, and a sudden current collapse phenomenon when the quiescent bias exceeds 175 V. Furthermore, the measurements show a common signature: the total current collapse is the result of the trapping phenomena occurring around the Schottky contact corner. The trap levels of 0.5 eV and 1.0 eV have been characterized from current transient spectroscopy. A TCAD model with these two trap levels as donor states at the Si3N4/AlGaN interface has been defined, to understand their role and explain the observed behavior of AlGaN/GaN SBDs from this dynamic measurement. We propose that trapping at deep energy levels (Trap1 = 1.0 eV), existing at the Si3N4/AlGaN interface, is responsible for the gradual current reduction observed for negative quiescent biases up to Anode-to-Cathode voltage (VAC )o f175 V. The electron filling at the shallower traps with high density at energy level located 0.5 eV starts at higher reverse biases, resulting in a strong Fermi-level pinning, which can be the cause of sudden current collapse. 2014 Published by Elsevier Ltd.

R_{\mathrm{\scriptscriptstyle ON}}

In this paper, we have extensively investigated the impact of anode recess on the reverse leakage current, forward voltage (VF), and dynamic characteristics of Au-free AlGaN/GaN Schottky barrier diodes with a gated edge termination (GET-SBDs) on 200-mm silicon substrates. By increasing the number of atomic layer etching (ALE) cycles for anode recessing, we have found that: 1) the reverse leakage current is strongly suppressed due to a better electrostatic control for pinching off the channel in the GET region; a median leakage current of ~1 nA/mm and an ION/IOFF ratio higher than 108 have been achieved in GET-SBDs with six ALE cycles; 2) the forward voltage (~1.3 V) is almost independent of the ALE cycles, taking into account its statistical distribution across the wafers; 3) when the remaining AlGaN barrier starts to be very thin (in the case of six ALE cycles), a spread of the ON-resistance, mainly attributed to the GET region, can occur due to the difficult control of the remaining AlGaN thickness and surface quality; and 4) the dynamic forward voltage of GET-SBDs shows a mild dependence on the ALE process in pulsed I-V characterization, and a more ALE-dependent dynamic ON-resistance is observed.

of AlGaN/GaN Schottky Barrier Diode With AlGaN:C Back Barrier

In this work we report on the two most common failure modes for AlGaN/GaN-based HEMTs: the gate leakage increase and the output current drop. First, by performing step-stress experiments in function of the step-time (tSTEP) we show that the critical voltage for the increase of gate leakage current depends on the tSTEP and is not associated with a permanent drop of the output current. Consequently, identification of the critical voltage by means of step-stress is not meaningful per se since it depends on the tSTEP used. Second, we show that during high power stress at high voltage a permanent output current drop occurs. The failure analysis reveals the formation of crystallographic defects in the AlGaN layer along the whole width of the gate, in agreement with the inverse piezoelectric theory. However, in contrast to the degradation model based on the inverse piezoelectric effect, these defects do not aid the leakage of electrons from the gate toward the drain electrode since the output current drop is not associated with an increase of the gate leakage current. Therefore, combining the outcome of the two experiments, we suggest that the two most common failure modes are not correlated despite both might concur to the device degradation. Finally, an excellent stability is shown for devices with reduced Al content in the AlGaN barrier, highlighting the fundamental role of strain on reliability of AlGaN/GaN-based devices.

Si Trench Around Drain (STAD) technology of GaN-DHFETs on Si substrate for boosting power performance

This paper reports for the first time the experimentally obtained piezoresistive coefficients of microcrystalline silicon-germanium (mucSiGe), which is proposed as a new structural material for piezoresistive micro-electromechanical systems (MEMS). We measure the resistance variation of several piezoresistors under a uniform and uniaxial stress provided by a four point bending (4 PB) fixture. The stress values are determined both by theory and from finite elements (FE) simulations. FE simulations are done as well to investigate the potential of using mucSiGe for a piezoresistive pressure sensor application.