Son K. Tran

Adhesion issues in flip-chip on organic modules

Flip chip attach on organic carriers is a novel electronic packaging assembly method which provides advantages of high I/O counts, electrical performance and thermal dissipation. In this structure, the flip chip device is attached to the organic laminate with predeposited eutectic solder. Mechanical coupling of chip and laminate is done via underfill encapsulant materials. As the chip size increases, the thermal mismatch between silicon and its organic carrier become greater. Adhesion becomes an important factor, since the C4 joints fail quickly if delamination of the underfill from either the chip or the solder mask interface occurs. Newly developed underfills have been studied to examine their properties, including interfacial adhesion strength, flow characteristics, void formation and cure kinetics. This paper describes basic investigations into the properties of these underfills and also how these properties related to the overall development process. In addition, experiments were performed to determine the effects on adhesion degradation of flip chip assembly processes and materials such as IR reflow profile, flux quantity and residues. Surface treatment of both the chip and the laminate prior to encapsulation were studied to enhance underfill adhesion. Accelerated thermal cycling and HAST (highly accelerated stress testing) were conducted to compare various underfill properties and reliability responses.

Underfill: The Enabling Technology for Flip-Chip Packaging

Organic polymer reinforcement of area-array solder connections between semiconductor chips and substrates has become an essential part of flip-chip packaging. Although flip-chip interconnection, or controlled collapse chip connection (C4) as it is also known, has a long history prior to the use of any reinforcement [1]; the use of a polymeric material to surround the solder connections beneath attached chips has allowed flip chips with large die footprints and increased neutral point distances to be utilized even with organic chip carriers.

Evolution of a unique flip chip MCM-L package

Flip chip (FC) packaging is gaining acceptance in the electronics packaging arena. More sources of bumped die and high density PWB laminates are becoming available, known good die (KGD) issues are being resolved by several companies, and design tools to perform FC packaging design are becoming more readily available. This is the infrastructure FC packaging requires to become the packaging method of choice, specially for >200 I/O applications. FC packages come in a variety of styles: FC plastic ball grid arrays (FC/PBGAs), FC plastic quad flat packs (FC/PQFPs), etc. At present, the industrys drive is towards single chip packages on low cost laminates, i.e. organic substrates. Work is beginning in the area of multichip FC packages, due to the need to increase memory to microprocessor communication speed. In this article, we discuss a unique FC/MCM-L package. We begin with the development and reliability testing of a one to four chip leadless FC/MCM-L package. Unlike traditional surface mount components, which are attached to PWBs with leads, the SMT pads within the package body are used for attachment to a PWB. Collapsible eutectic solder domes are deposited on the SMT pads by screen printing. After reflow, these domes are used to connect the FC/MCM-L to the PWB. Challenges encountered during package design, PWB fabrication, and first and second level assembly are discussed. The second part of this paper focuses on the extension of this FC/MCM-L package to a ball grid array (BGA) second level interconnect. Change of FC attachment method, design enhancements, assembly and reliability testing results are presented.