Stefan Jessenig
ams AG
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Featured researches published by Stefan Jessenig.
Proceedings of SPIE | 2012
Ingrid Jonak-Auer; Jordi Teva; Jong Mun Park; Stefan Jessenig; M. Rohrbacher; Ewald Wachmann
We report on a new and very cost effective way to integrate PIN photo detectors into a standard CMOS process. Starting with lowly p-doped (intrinsic) EPI we need just one additional mask and ion implantation in order to provide doping concentrations very similar to standard CMOS substrates to areas outside the photoactive regions. Thus full functionality of the standard CMOS logic can be guaranteed while the photo detectors highly benefit from the low doping concentrations of the intrinsic EPI. The major advantage of this integration concept is that complete modularity of the CMOS process remains untouched by the implementation of PIN photodiodes. Functionality of the implanted region as host of logic components was confirmed by electrical measurements of relevant standard transistor as well as ESD protection devices. We also succeeded in establishing an EPI deposition process in austriamicrosystems 200mm wafer fabrication which guarantees the formation of very lowly p-doped intrinsic layers, which major semiconductor vendors could not provide. With our EPI deposition process we acquire doping levels as low as 1•1012/cm3. In order to maintain those doping levels during CMOS processing we employed special surface protection techniques. After complete CMOS processing doping concentrations were about 4•1013/cm3 at the EPI surface while the bulk EPI kept its original low doping concentrations. Photodiode parameters could further be improved by bottom antireflective coatings and a special implant to reduce dark currents. For 100×100μm2 photodiodes in 20μm thick intrinsic EPI on highly p-doped substrates we achieved responsivities of 0.57A/W at λ=675nm, capacitances of 0.066pF and dark currents of 0.8pA at 2V reverse voltage.
Proceedings of SPIE | 2011
Jordi Teva; Stefan Jessenig; Ingrid Jonak-Auer; Franz Schrank; Ewald Wachmann
PIN photodiodes are semiconductor devices widely used in a huge range of applications, such as photoconductors, charge-coupled devices and pulse oximeters for medical applications. The possibility to combine and to integrate the fabrication of the sensor with its signal conditioning circuitry in a CMOS process allows device miniaturization in addition to enhance its properties lowering the production and assembly costs. This paper presents the design and characterization of silicon based PIN photodiodes integrated in a CMOS commercial process. A high-resistivity, low impurity substrate is chosen as the start material for the PIN photodiode array fabrication in order to fabricate devices with a minimum dark current. The dark current is studied, analyzed and measured for two different starting materials and for different geometries. A model previously proposed is reviewed and compared with experimental data.
Proceedings of SPIE | 2010
Ingrid Jonak-Auer; A. Marchlewski; Stefan Jessenig; A. Polzer; Wolfgang Gaberl; A. Schmiderer; Ewald Wachmann; Horst Zimmermann
We report on monolithically integrated PIN photodiodes whose responsivity values could be significantly enhanced over the whole spectral range by the implementation of a Bottom Antireflective Coating (BARC) process module into austriamicrosystems 0.35μm CMOS as well as high-speed SiGe BiCMOS technologies. The resulting photodiodes achieve excellent responsivities together with low capacitances and high bandwidths. We processed finger-photodiodes with interdigitated n+ cathodes, which are especially sensitive at low wavelengths, and photodiodes with full area n+ cathodes on very lightly p-doped start material. We present a method of depositing an antireflective layer directly upon the Si surface of the photodiode by changing the standard process flow as little as possible. With just one additional mask alignment and a well controlled etch procedure we manage to remove the thick intermetal oxide and passivation nitride stack over the photodiodes completely without damaging the Si surface. The following deposition of a CVD Silicon Nitride BARC layer not only minimizes the reflected fraction of the optical power but also acts as passivation layer for the photodiodes. Another benefit of BARC processing is the fact that in-wafer and wafer-to-wafer quantum efficiency variations can be dramatically reduced. In our experiments we deposited BARC layers of different thicknesses that were optimised for violet, red and infrared light. Responsivity measurements resulted in values as high as R=0.27A/W at λ=410nm, R=0.53A/W at λ=670nm and R=0.5A/W at λ=840nm.
Archive | 2011
Jochen Kraft; Stefan Jessenig; Günther Koppitsch; Franz Schrank; Jordi Teva; Bernhard Löffler; Jörg Siegert
international conference on group iv photonics | 2018
Bernhard Schrenk; Fabian Laudenbach; Paul Müllner; Stefan Jessenig; Jochen Kraft; Moritz Eggeling; Daivid Fowler; Rainer Hainberger; Hannes Hübel
Archive | 2016
Jochen Kraft; Georg Parteder; Stefan Jessenig; Franz Schrank
Archive | 2013
Ingrid Jonak-Auer; Stefan Jessenig; Arnold Schmiderer
Archive | 2013
Jordi Teva; Frederic Roger; Ewald Stückler; Stefan Jessenig; Rainer Minixhofer; Ewald Wachmann; Martin Schrems; Günther Koppitsch
Archive | 2012
Jochen Kraft; Stefan Jessenig; Günther Koppitsch; Franz Schrank; Jordi Teva; Bernhard Löffler; Jörg Siegert
Archive | 2011
Stefan Jessenig; Kraft Jochen; Bernhard Löffler; Stefan Schindler