Stefan Tiensuu

A novel high-frequency high-voltage LDMOS transistor using an extended gate RESURF technology

A novel high-voltage DMOS transistor with a low doped extended gate is presented. The device withstands 240 V in the off-state and has a specific on-resistance of 24 m/spl Omega/cm/sup 2/. The transconductance is 60 mS/mm at 3 V gate voltage. The sub-micron channel length gives small-signal high-frequency performance as f/sub T/=2.8 GHz and f/sub max/=5.8 GHz and the unilateral power gain at 900 MHz is over 15 dB. The dependence of breakdown voltage and on-resistance on gate doping level and polysilicon gate length is investigated with device simulations. It is found that the breakdown voltage is highly dependent on the gate doping level.

Silicon-on-diamond MOS-transistors with thermally grown gate oxide

Summary form only given. Self-heating in Silicon-On-Insulator (SOI) devices has during the past years attracted lots of attention and is a problem that remains to be solved. It has, furthermore, been shown that in smart power devices, thick buried oxides of 3 /spl mu/m or more are desired to prevent the substrate potential to lower breakdown voltages. However, these thicker buried oxides will only aggravate the thermal limitations imposed by the buried oxide. Due to the outstanding thermal properties of diamond compared to silicon dioxide, it would consequently be advantageous if silicon dioxide could be replaced with diamond in future SOI materials. Even though it has been shown that diamond is compatible with conventional silicon processing, no MOS-transistors with thermally grown gate oxide has been manufactured up to date, due to the difficulty in protecting diamond during furnace oxidations. In this paper Silicon-On-Diamond (S-O-D) MOS-transistors with thermally grown gate oxide are presented for the first time.

Integration of Silicon and Diamond, Aluminum Nitride or Aluminum Oxide for Electronic Materials

Material integration for the formation of advanced silicon-on-insulator materials by wafer bonding and etch-back will be discussed. Wafer bonding allows combining materials that may not be possible to grow on top of each other by any other technique. In our experiments, polycrystalline diamond, aluminum nitride or aluminum oxide films with thickness of 0.1-5 µm were deposited on silicon wafers. Bonding experiments were made with these films to bare silicon wafers with the goal of forming silicon-on-insulator structures with buried films of polycrystalline diamond, aluminum nitride or aluminum oxide. These silicon-on-insulator structures were aimed to address self-heating effects in conventional silicon-on-insulator materials with buried layers of silicon dioxide. The surfaces of the deposited diamond films were, by order of magnitude, too rough to allow direct bonding to a silicon wafer. In contrast the deposited aluminum nitride and aluminum oxide films did allow direct bonding to silicon. Bonding of the diamond surface to silicon was instead made through a deposited and polished layer of polycrystalline silicon on top of the diamond. In the case of the aluminum nitride electrostatic bonding was also demonstrated. Further, the compatibility of these insulators to silicon process technology was investigated.

Silicon on diamond heat sinks by bonding and etch back

In this abstract a concept is presented aimed to increase the heat distribution and to reduce the thermal resistance in SOI-devices. This is realized using a combination of fusion bonding and thinning against stopping layers with deposition of poly-crystalline diamond as the buried isolator. Thus, by replacing oxide with diamond, a Silicon-on-Diamond (SOD) structure is formed.<<ETX>>