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Dive into the research topics where Sung-Hae Lee is active.

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Featured researches published by Sung-Hae Lee.


international reliability physics symposium | 2007

Investigation of hot carrier effects in n-MOSFETs thick oxide with HfSiON and SiON gate dielectrics

Kab-jin Nam; Sung-Hae Lee; Dong-Chan Kim; Seok-Hun Hyun; Jumi Kim; In Sang Jeon; Sang-Bom Kang; S. Choi; U-In Chung; June Moon

This paper reports the reliability characteristics of poly gated n-MOSFETs with HfSiON and SiON gate dielectrics in both thin and thick oxide of dual gate oxide scheme. Hot carrier stress (HCS) at Isub, max condition on thick oxide is found to be the most critical part among the various reliability concerns. Regardless of gate dielectric and gate oxide thickness, the degradation behavior of the condition of Isub, max and Vg=Vd HCS is mainly SS increase and Vth shift, respectively. Therefore, for precise evaluation of the device reliability, it is necessary that HC immunity at Isub, max stress should be checked in thick oxide transistor below 50 nm design rule era.


international memory workshop | 2010

Highly-reliable NAND flash memory using Al 2 O 3 -inserted inter-poly dielectric

Sung-Hae Lee; Bon-young Koo; Ki-Hyun Hwang; Si-Young Choi; Joo-Tae Moon

The improvement of device performances has been achieved successfully through OAO IPD EOT scaling, which shows that OAO IPD is applicable to sub-40nm devices which require aggressive scaling of IPD EOT. Charge loss of OAO IPD at high temperature is explained by thermionic emission of alumina traps. Trap profiles of alumina were obtained by monitoring Vth shift above 100°C. OAO IPD shows good data retention at room temperature, which is consistent with trap profiles.


Archive | 2011

SEMICONDUCTOR MEMORY DEVICES AND METHODS OF FORMING THE SAME

Jung-Ho Kim; Daehyun Jang; Myoung-Bum Lee; Ki-Hyun Hwang; Sang-Ryol Yang; Yong-Hoon Son; Ju-Eun Kim; Sung-Hae Lee; Dongwoo Kim; Jin-Gyun Kim


Archive | 2006

Methods of forming silicon dioxide layers using atomic layer deposition

Sung-Hae Lee; Ki-Hyun Hwang; Jin-Gyun Kim; Sang-Ryol Yang; H.J. Kim; Jin-Tae Noh


Archive | 2006

Methods of Forming Conductive Polysilicon Thin Films Via Atomic Layer Deposition and Methods of Manufacturing Semiconductor Devices Including Such Polysilicon Thin Films

Jin-Gyun Kim; Ki-Hyun Hwang; Jin-Tae Noh; H.J. Kim; Sung-Hae Lee


Archive | 2006

Method of manufacturing a charge-trapping dielectric and method of manufacturing a sonos-type non-volatile semiconductor device

Sung-Hae Lee; Ju-Wan Lim; Jae-Young Ahn; Sang-Ryol Yang; Ki-Hyun Hwang


Archive | 2012

METHOD OF MANUFACTURING A NON-VOLATILE MEMORY DEVICE HAVING A VERTICAL STRUCTURE

Sung-Hae Lee; Ki-Hyun Hwang; Jin-Gyun Kim


Archive | 2006

Method of manufacturing charge trap insulator, and method of manufacturing nonvolatile semiconductor device of sonos type

Jae Young Ahn; Ki-Hyun Hwang; Sung-Hae Lee; Ju-Wan Lim; Sang-Ryol Yang; 宰永 安; 聖海 李; 柱完 林; 棋鉉 黄


Archive | 2011

Vertical Memory Devices Including Indium And/Or Gallium Channel Doping

Jin-Gyun Kim; Ki-Hyun Hwang; Sung-Hae Lee; Ji-Hoon Choi


Archive | 2007

SEMICONDUCTOR MEMORY DEVICE INCLUDING CHARGE TRAP LAYER WITH STACKED NITRIDE LAYERS

Kwangmin Park; Ki-Hyun Hwang; Jae-Young Ahn; Seung-Hwan Lee; Ju-Wan Lim; Sung-Hae Lee

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