Susumu Tanida

Synchronous semiconductor device having circuitry capable of surely resetting test mode

Semiconductor device having contact check circuit

Semiconductor memory device having circuit for activating predetermined rows of memory cells upon detection of disturb refresh test

Semiconductor memory module

Semiconductor memory device provided with an interface circuit consuming a reduced amount of current consumption

Semiconductor memory device having reference potential generating circuit

Semiconductor memory device comprising address transition detecting circuit having stable response characteristic for address signal conversion

Semiconductor memory device having function of generating boosted potential

Semiconductor memory device provided with I/O clamp circuit

Semiconductor memory device employing an abnormal current consumption detection scheme