Sylvain Bourdel

High efficiency UWB pulse generator for ultra-low-power applications

This paper presents the design of a fully integrated ultra-low-power Ultra Wide Band (UWB) pulse generator. The circuit is designed and optimized for low rate and localization applications. This UWB transmitter is based on the impulse response filter method in order to achieve high energy sub-nanosecond pulses. The circuit has been integrated in a ST-Microelectronics CMOS 0.13 mu m technology with a supply voltage of 1.2 V on a die area of 0.56 mm(2). A power manager is used to reduce the power leakages to 3.91 mu W which gives a power consumption of 3.98 Mw at 10 kb/s. The measured dynamic energy consumed per pulse is 68 pJ and the measured energy of the emitted pulse is 2.15 pJ.

Ultra-wideband voltage controlled oscillator with commutable phases for BPSK implementation

An ultra-wideband Voltage Controlled Oscillator (VCO) is presented in this paper. The circuit achieves fast startups and stops which allow wideband pulses to be generated. In addition, the VCO allows bipolar modulations as Binary Phase Shift Keying to be implemented without the need of a shaping circuit as a mixer. The proposed VCO has been integrated on a silicon area of 0.003mm2 in a 65nm CMOS technology operating with a supply voltage of 1.2V. The oscillator output provides large differential oscillations from 2.6GHz to 12.3GHz. Measurement has demonstrated the frequency agility of the proposed VCO which covers the mandatory channels of the low (resp. high) bands centered on 4492.8MHz (resp. 7987.2MHz) defined by the IEEE 802.15.4 standard. The VCO power consumption is about 3.2mW/GHz. By using Current Mode Logic (CML) gates, the power consumption can be reduced to 3.84uW only when the VCO is not running (switch off).

Emitters and Receivers for Impulse Radio Ultra-Wideband and Their Healthcare Applications

Healthcare applications requirements are presented in this paper and a state-of-the-art analysis shows that Impulse Radio Ultra-WideBand (IR-UWB) is particularly suitable in terms of energy efficiency for this type of short range communications for which different data rates are needed. Power saving strategies for emitters and receivers are then discussed and three examples of implementations are presented with their measurement results. The first is a versatile transmitter with tunable bandwidth which exhibits 0.9Vpp pulses and a power consumption of at least 11.03mW at 50Mbps. The second is a 3.1-10.6GHz transmitter with a power management scheme implemented on-chip which exhibits 2Vpp pulses and a power consumption of 7.3uW at 100kbps and 3.4mW at 100Mbps. The last is a non-coherent 3-5GHz receiver with -89dBm sensitivity at 100kbps and 144pJ/bit energy consumption when used in a power gated 100Mbps burst mode.

Digitally controlled transconductor based on a quantum transconductance

A new CMOS digitally controlled negative-transconductance amplifier (DTA) and an application example of a 4-Bits-Digitally Controlled Oscillator (DCO) are presented in this paper. The DTA is based on the traditional Digital CMOS inverter topology. From simulation and under 1.2 volts supply voltage, the proposed DCO oscillates from 375MHz to 475MHz which is compatible with the Medical Implant Communication Service (MICS) frequency band. The maximum total power consumption is about 2.5mW and only 2.5nW in power-off mode. All simulations have been performed using a CMOS 130nm process design kit from STMicroelectronics.

A Fully Differential 7.2-8.5GHz LNA for a Self Synchronized and Duty-Cycled UWB OOK Receiver

This paper presents a low power Impulse-Radio Ultra-WideBand (IR-UWB) receiver for low range and low data rates applications. The receiver adopts a non coherent detection with duty cycling that allows very low power consumption. The receiver operates in the high band of the UWB frequency band. It has been designed for the 7.2-8.5GHz bandwidth and covers channels 8, 9, 10, and 11 of the IEEE 802.15.4a standard. The receiver has been implemented in 130nm standard CMOS process and occupies an area of 1.5mm2. Post-layout simulations of the fully differential Low Noise Amplifier (LNA) including parasitic effects of the package show 40 dB voltage gain and 4 dB noise figure. The LNA turn on time is less than 3 ns. When synchronized and duty cycled with an analog Clock and Data Recovery (CDR) with 23ns peak to peak jitter the receiver consumes 1.95mW at 1Mbps data rate.

Theoretical Analysis and Sensitivity Modeling of an Energy Detector for IR-UWB Applications

This paper deals with the theoretical and behavioral modeling of a IR-UWB front-end system, using MATLAB and ADS PTOLEMY simulators. The main objective of this paper is to make a comparative trial of the sensitivity of an integrator based energy detector and a low pass filter based energy detector. We demonstrated that the use of an integrator for the energy detector improve the sensitivity when several pulses are used in one symbol whereas a filter performs better for unique pulse signaling.

Ultra low power and high gain switched CMOS g m - boosted current reused mixer for wireless multi-standard applications

An ultra low power and low voltage down conversion mixer is presented in this paper for the frequency band of 1.8-2.4GHz. Designed in 0.18 µ m CMOS technology, the double balanced proposed mixer is composed by two cascaded stages. The first one is based on cross coupled capacitors technique in current reused topology providing a high voltage gain, while the second one employs a current reused transducer coupled to LO driven inverters to perform the down conversion. All the devices operate on moderate inversion for better trade-off between gain, linearity, and low power consumption. The post layout simulation shows a 23dB of voltage gain conversion, an IIP3 of -2dBm, with 300 µ W of power consumption under 0.9V voltage supply.