Remy Vauche

A 9-pJ/Pulse 1.42-Vpp OOK CMOS UWB Pulse Generator for the 3.1–10.6-GHz FCC Band

This paper presents the design of a fully integrated ultra-wideband (UWB) pulse generator for the Federal Communications Commission (FCC) 3.1-10.6-GHz band. This generator is reserved for medium rate applications and achieves pulses for an on-off keying (OOK) modulation, pulse position modulation, or pulse interval modulation. This UWB transmitter is based on the impulse response filter method, which uses an edge combiner in order to excite an integrated bandpass filter. The circuit has been integrated in an ST-Microelectronics CMOS 0.13-¿m technology with 1.2-V supply voltage and the die size is 0.54 mm2. The pulse generator power consumption is 9 pJ per pulse and achieves a peak to peak magnitude of 1.42 V. The pulse is FCC compliant and the generator can be used with a rate up to 38 Mbs-1 with an OOK modulation. Based on the FCC power spectral density limitation, a sizing method is also presented.

Fully tunable UWB pulse generator with zero DC power consumption

The design of a fully tunable pulse generator using only logic cells is presented and simulated with 0.13µm standard CMOS process. The generator is based on the elementary pulse combination and can synthesize different UWB pulse shapes. The generator uses logic gates to achieve the elementary pulses and a H-bridge to make the combination which leads to a zero DC power consumption. To achieve FCC compliant pulse having 2VPP magnitude the generator consumes 140 pJ by pulse using 1.2V supply voltage.

A remotely UHF powered UWB transmitter for high precision localization of RFID tag

The design of a remotely UHF powered UWB transmitter is presented in 0.13µm CMOS standard process. Power harvesting unit is based on a Dickson voltage multiplier and UWB pulse generator uses filtered combined edge method. Multi-Vt technique and CMOS logic allows pulse generator power consumption between two consecutive pulses to be reduced enough to be remotely powered. It achieves FCC compliant pulses having 1.82Vpp and a PRF of 15kHz at 10m thanks to the power harvesting unit.

Low-power CMOS energy detector for noncoherent impulse-radio UWB receivers

A low power CMOS energy detector for 3.1–10.6 GHz non-coherent impulse-radio UWB receivers is implemented in a 0.13 µm CMOS process. The detector architecture is based on a squarer circuit realized with MOS transistors biased in the sub-threshold region. The squared signal is integrated using a low pass amplifier that allows the receiver gain to be optimized. A comparator with a tunable threshold is then used as a decision circuit. Experimental results show that a BER of 10− is achieved for a peak-to-peak voltage of 140 mV at the detector input at 200 Mb/s data rate. Assuming that the detector is driven by a LNA of gain 22 dB, leads to a receiver sensitivity of −45 dBm. The receiver dissipates only 25 mW, corresponding to an energy efficiency of 0.13 nJ/bit and the chip occupies 0.7 mm2.

CMOS UWB pulse generator co-designed with package transition

The design of an UWB pulse generator is presented in the context of low cost applications. The pulse generator is fully integrated in a 0.13 μm CMOS technology and achieves 1Vpp magnitude pulses with only 2.25pJ of energy consumed by pulse and 1.2V voltage supply. The generation method used in this design is well suited for packaged IC using wire bond interconnections. Tow methods of interconnection are presented. It is shown that a co-design of the generator with the package transition can preserve the signal integrity while increasing the pulse magnitude up to 1.4Vpp with the same power budget.

An inductorless CMOS UWB pulse generator with active pulse shaping circuit

The design of an UWB pulse generator is presented. The pulse generator is based on an elementary pulse combination technique which enables the emitted pulse to be precisely shaped. This technique is implemented with no inductor or passive network and can be used to ensure regulation compliance. This generator has been fully integrated in a 0.13 μm CMOS standard technology. Its area is 0.06mm2 only and it can be programmed to synthesize different pulse shapes. For FCC compliant pulse shapes, the maximum measured 10dB bandwidth is 3.5GHz, and the maximum peak to peak magnitude is 220mV. The measured maximal power consumption is 87.6mW at 800MHz Pulse Repetition Frequency (PRF).

Low-power clock and data recovery circuit for IR-UWB receiver power management

A low power clock and data recovery (CDR) for low data rate applications is presented. The CDR circuit, implemented as a phase locked-loop (PLL), deals with very narrow pulses from an energy detector in a non-coherent Impulse Radio based Ultra Wide Band (IR-UWB) receiver. To considerably reduce the power consumption of such a receiver, the proposed circuit is intended to be used to turn off analog/RF blocks between detected pulses. For that, a modified Hogge-type phase detector (PD) is proposed that enables the PLL to efficiently work with “return-to-zero (RZ) low duty cycle” (UWB pulses) input data. A simple pre-charge circuit is added to reduce the PLL lock time. The circuit has been realized in a 0.13 μm CMOS technology. Process variations taken into account through corner simulations show that the loop locks for all corners. Post-layout simulations at typical corner parameters show a power consumption of only 16 μW, a lock time of 130 μs and a recovered clock peak-to-peak jitter of 25 ns (2.5% UI) for an input data rate of 1 Mb/s.

High efficiency UWB pulse generator for ultra-low-power applications

This paper presents the design of a fully integrated ultra-low-power Ultra Wide Band (UWB) pulse generator. The circuit is designed and optimized for low rate and localization applications. This UWB transmitter is based on the impulse response filter method in order to achieve high energy sub-nanosecond pulses. The circuit has been integrated in a ST-Microelectronics CMOS 0.13 mu m technology with a supply voltage of 1.2 V on a die area of 0.56 mm(2). A power manager is used to reduce the power leakages to 3.91 mu W which gives a power consumption of 3.98 Mw at 10 kb/s. The measured dynamic energy consumed per pulse is 68 pJ and the measured energy of the emitted pulse is 2.15 pJ.

A 4GHz CMOS 130 nm IR-UWB dual front-end transceiver for IEEE802.15 standards

A single chip CMOS 130 nm transceiver for UWB-IR communications was assembled and measured for further integration into a demonstrator aiming compatibility with the recently published IEEE802.15.6 standard for Body Area Networks. The transmitter achieves a 10.9 mA current consumption for the 15.6MHz pulse repetition frequency and 1.5V peak-to-peak voltage. The receiver is an innovative combination of a low current consumption non coherent envelop detector and of a high sensitivity coherent quadrature demodulator. Different compromises in sensitivity, current consumption and acquisition speed are made possible. This paper briefly describes the architecture and provides the chip measurement results.

High output dynamic UWB pulse generator for BPSK modulations

This paper presents the design of a fully integrated pulse generator which allows BPSK modulation to be implemented. This emitter is based on the response filter architecture and has been integrated in a 130 nm CMOS technology with a 1.2 V supply voltage on a silicon area of 2.88 mm2. The bandwidth at -10 dB is about 1.8 GHz around 3.52 GHz. The output dynamic voltage is equal to 1.72 V peak to peak on a 100 Ω differential load which gives an energy of 1.93 pJ for the twice bipolar generated pulses and demonstrates the pulse generator capability to be used for bipolar modulations.