Jean Gaubert

A 9-pJ/Pulse 1.42-Vpp OOK CMOS UWB Pulse Generator for the 3.1–10.6-GHz FCC Band

This paper presents the design of a fully integrated ultra-wideband (UWB) pulse generator for the Federal Communications Commission (FCC) 3.1-10.6-GHz band. This generator is reserved for medium rate applications and achieves pulses for an on-off keying (OOK) modulation, pulse position modulation, or pulse interval modulation. This UWB transmitter is based on the impulse response filter method, which uses an edge combiner in order to excite an integrated bandpass filter. The circuit has been integrated in an ST-Microelectronics CMOS 0.13-¿m technology with 1.2-V supply voltage and the die size is 0.54 mm2. The pulse generator power consumption is 9 pJ per pulse and achieves a peak to peak magnitude of 1.42 V. The pulse is FCC compliant and the generator can be used with a rate up to 38 Mbs-1 with an OOK modulation. Based on the FCC power spectral density limitation, a sizing method is also presented.

Modeling and Design of CMOS UHF Voltage Multiplier for RFID in an EEPROM Compatible Process

Modeling and design of CMOS ultra-high-frequency (UHF) voltage multipliers are presented. These circuits recover power from incident radio frequency (RF) signal and supply battery less UHF RF identification (RFID) transponders. An analytical model of CMOS UHF voltage multipliers is developed. It permits to determine the main design parameters in order to improve multiplier performance. The design of this kind of circuits is then greatly simplified and simulation time is reduced. Thanks to this model, a voltage multiplier is designed and implemented in a low-cost electrically erasable programmable read-only memory compatible CMOS process without Schottky diodes layers. Measurements results show communication ranges up to 5 m in the U.S. standard.

A 1 nJ/b 3.2-to-4.7 GHz UWB 50 Mpulses/s double quadrature receiver for communication and localization

This paper describes the integration in a 0.13 µm CMOS of an Ultra Wide Band (UWB) receiver for communication and localization. It operates in the whole 3.2-to-4.7 GHz band of the IEEE.802.15.4a regulation mask. The proposed double quadrature coherent architecture allows exploiting high resolution capability of short pulses in the time domain, with a low sampling clock at 50 MHz. Architecture offers high flexibility to cope with various channel conditions and robustness against out of band blockers. Maximum measured ranging error at 4m in wireless link is 3.8 cm and total receiver consumption at 50 Mpulses/s rate is 50 mW.

High-Voltage-Gain CMOS LNA For 6–8.5-GHz UWB Receivers

The design of a fully integrated CMOS low noise amplifiers (LNA) for ultra-wide-band (UWB) integrated receivers is presented. An original LC input matching cell architecture enables fractional bandwidths of about 25%, with practical values, that match the new ECC 6-8.5-GHz UWB frequency band. An associated design method which allows low noise figure and high voltage gain is also presented. Measurements results on an LNA prototype fabricated in a 0.13-mum standard CMOS process show average voltage gain and noise figure of 29.5 and 4.5 dB, respectively.

Double-Quadrature UWB Receiver for Wide-Range Localization Applications With Sub-cm Ranging Precision

The interest of industry for localization technologies is growing, because of their ability to allow a wide variety of applications. Among the different technologies, UWB is known to potentially offer the best precision. This paper presents a fully integrated low-power UWB impulse radio receiver dedicated to communication and ranging applications. The new architecture based on double quadrature is used to reach sub-cm ranging precision while limiting the speed requirements and complexity of ADC and digital signal processing. Much attention has been paid to rejecting the out-of-band signals which could degrade receiver performance while fully exploiting the available spectrum in the [3-5 GHz] band. The 5.8-mm2 0.13- μm CMOS receiver consumes 50 mW at 50-Mb/s maximum data rate. It shows -95-dBm sensitivity at 1 Mb/s and 2.5-mm maximum ranging error at 10 m.

Contrast enhanced CMR in acute myocarditis: what is the optimal moment for imaging?

The pathological processes (ie alteration of myocardial perfusion) that occur during the acute phase of a myocarditis, are different from those of myocardial infarction. Myocardial enhancement kinetics might be different in acute myocarditis compared to myocardial infarct that may impact the optimal moment for imaging acute myocarditis.

Fully tunable UWB pulse generator with zero DC power consumption

The design of a fully tunable pulse generator using only logic cells is presented and simulated with 0.13µm standard CMOS process. The generator is based on the elementary pulse combination and can synthesize different UWB pulse shapes. The generator uses logic gates to achieve the elementary pulses and a H-bridge to make the combination which leads to a zero DC power consumption. To achieve FCC compliant pulse having 2VPP magnitude the generator consumes 140 pJ by pulse using 1.2V supply voltage.

A remotely UHF powered UWB transmitter for high precision localization of RFID tag

The design of a remotely UHF powered UWB transmitter is presented in 0.13µm CMOS standard process. Power harvesting unit is based on a Dickson voltage multiplier and UWB pulse generator uses filtered combined edge method. Multi-Vt technique and CMOS logic allows pulse generator power consumption between two consecutive pulses to be reduced enough to be remotely powered. It achieves FCC compliant pulses having 1.82Vpp and a PRF of 15kHz at 10m thanks to the power harvesting unit.

RF Low-Pass Design Guiding Rules to Improve PCB to Die Transition Applied to Different Types of Low-Cost Packages

We present in this paper some design rules to improve the signal integrity (SI) of a package transition. The design rules are based on standard low-pass (LP) filter synthesis methodology. This methodology uses the modeling of the package transition by a pi network and is valid as long as the through phase shift of the package transition remains sufficiently small. Based on this pi network approximation, it is possible to add external distributed elements at the package carrier level and lumped elements at the DIE level to build an equivalent low-pass ladder filter. This approach improves significantly the signal integrity properties of the package transition without modifying the package. In some cases the frequency bandwidth for which the return loss (RL) remains higher than 20 dB can be doubled by using this method.

Low-power CMOS energy detector for noncoherent impulse-radio UWB receivers

A low power CMOS energy detector for 3.1–10.6 GHz non-coherent impulse-radio UWB receivers is implemented in a 0.13 µm CMOS process. The detector architecture is based on a squarer circuit realized with MOS transistors biased in the sub-threshold region. The squared signal is integrated using a low pass amplifier that allows the receiver gain to be optimized. A comparator with a tunable threshold is then used as a decision circuit. Experimental results show that a BER of 10− is achieved for a peak-to-peak voltage of 140 mV at the detector input at 200 Mb/s data rate. Assuming that the detector is driven by a LNA of gain 22 dB, leads to a receiver sensitivity of −45 dBm. The receiver dissipates only 25 mW, corresponding to an energy efficiency of 0.13 nJ/bit and the chip occupies 0.7 mm2.