Sylvain Joblot

AlGaN/GaN HEMTs on a (001)-Oriented Silicon Substrate Based on 100-nm SiN Recessed Gate Technology for Microwave Power Amplification

AlGaN/GaN high-electron mobility transistors on (001)-oriented silicon substrates with a 0.1-mum gamma-shaped gate length are fabricated. The gate technology is based on a silicon nitride (SiN) thin film and uses a digital etching technique to perform the recess through the SiN mask. An output current density of 420 mA/mm and an extrinsic transconductance gm of 228 mS/mm are measured on 300-mum gate-periphery devices. An extrinsic cutoff frequency ft of 28 GHz and a maximum oscillation frequency fmax of 46 GHz are deduced from S-parameter measurements. At 2.15 GHz, an output power density of 1 W/mm that is associated to a power-added efficiency of 17% and a linear gain of 24 dB are achieved at VDS = 30 V and VGS = -1.2 V.

Through Silicon Capacitor co-integrated with TSV as an efficient 3D decoupling capacitor solution for power management on silicon interposer

First part of this paper discusses decoupling method limitation within the Power Delivery Network of a classical circuit and challenges introduced by 3D integrated circuit in term of power management. Solutions are exposed, such as integration of decoupling capacitor on silicon interposer. Second part of the paper focuses on the Through Silicon Capacitor (or TSC) as an alternative decoupling solution co-integrated with Through Silicon Vias on silicon interposer. TSC realization is described and architectural benefits of adding a partial copper-filling prior to the Metal-Insulator-Metal stack deposition are discussed. A distributed analytical model is used to quantify partial filling resistance contribution, pointing out a 6 decade decrease in ESR value of the structure. TSC process and matrix design parameters impact on capacitance density are studied. Finally, electrical performances of TSC modules are evaluated showing a low intrinsic impedance behavior granted by TSC parallel structure.

Electrical model and characterization of Through Silicon Capacitors (TSC) in silicon interposer

Inspired from Through Silicon Vias (TSVs), Through Silicon Capacitors (TSCs) are newly developed capacitors integrated throughout the silicon interposer. This paper deals with a demonstrator which investigates the first process steps of TSCs. A predictive modeling method of the impedance of large matrices of such components is proposed. The modeling method makes use of 2D/3D parasitic extraction software for the modeling of each parts of the structure. The resulting lumped RLCG parameters are used to generate a global equivalent circuit composed of segments of coupled distributed cells. The modeling method is validated by experimental results on the whole frequency range of use (up to 10 GHz). Such components demonstrate simultaneously high capacitance density (up to 23 nF/mm2), low parasitic equivalent series resistance and inductance and high serial resonance frequency (in GHz range for a capacitance value of 10 nF).

Through Silicon Capacitors (TSC) for noise reduction in Power Distribution Network

Inspired from Through Silicon Vias (TSVs), Through Silicon Capacitors (TSCs) are newly developed and integrated throughout silicon interposers. Thanks to the use of the third dimension in the silicon interposer, TSC technology allows to obtain high capacitance density, up to 56 nF/mm2. This paper deals with a demonstrator to investigate the impact of large matrices of TSCs (13×13 TSCs) on the electrical performance of Power Distribution Networks (PDN). First, the frequency response of TSCs matrix is modeled from DC to 10 GHz. Next, extracted spice models are used to simulate the PDN impedance of a typical processor circuit. Finally a transient analysis is performed to evaluate the performance of the PDN in the time domain. TSCs allow to reduce considerably voltage ripples on the PDN and one obtained less than 10% of voltage ripples for a total capacitance of 1.4 μF.

Modeling and Frequency Performance Analysis of Through Silicon Capacitors in Silicon Interposers

The feasibility of cointegration of new capacitors, named “through silicon capacitors” (TSCs) with “through silicon vias” in silicon interposers has recently been demonstrated. Two architectures of TSC are extensively investigated in this paper: “axial TSC” whose electrodes are connected on either sides of the silicon interposer and “radial TSC” with electrodes both connected to the metal layers of the back end of line. A general modeling method based on distributed cell segmentation is proposed for both architectures. Validation is performed by measurements from 1 kHz to 40 GHz (above the resonance frequency of the components). A comparative study between radial and axial architectures is performed, leading to the prediction of the performances of those new components. Finally, design rules are established for future integration for power delivery networks decoupling applications.