David Petit

Silicon thickness monitoring strategy for FD-SOI 28nm technology

The silicon thickness (Tsi) fluctuation monitoring on FD-SOI 28nm technology process is addressed by 2 different electrical characterization techniques. The first, capacitive, is adapted to within wafer variations and lot/wafer variations monitoring. The second, using the Idsat sensitivity to the Tsi in an addressable transistors array, allows to measure the local variations in the range of few tens of microns.

Analysis of process impact on local variability thanks to addressable transistors arrays

We designed an addressable transistors array to analyse local variability at the wafer scale. On FDSOI substrates, we measure no impact of the silicon thickness variations on short channel transistors, and demonstrate that the impact on large area transistors is no more visible when the Tsi is well controlled.