T. McNutt

A 1680-V (at 1

A high-voltage normally ON 4H-SiC vertical junction field-effect transistor (VJFET) of 0.143- cm2 active area was manufactured in seven photolithographic levels with no epitaxial regrowth and with a single masked ion-implantation event. The VJFET exhibits low gate-to-source p-n-junction leakage current with relatively sharp onset of breakdown. At a drain-current density of 1 mA/cm2, the VJFET blocks 1680 V at a gate bias of -24 V. A self-aligned floating guard-ring structure provides edge termination that blocks 77% of the 11.8-mum SiC drift layers limit. At a gate bias of 2.5 V and a corresponding gate current of 2 mA, the VJFET outputs 53.6 A (375 A/cm2) at a forward drain voltage drop of 2.08 V (780 W/cm2). The transistor current gain is ID / IG = 26 800, and the specific on-state resistance is 5.5 mOmegamiddotcm2. To our best knowledge, this is the largest area SiC vertical-channel JFET reported to date and outputs more drain current than any 1200-V class vertical-channel JFET under identical heat-load and gate biasing conditions.

\hbox{mA/cm}^{2}

This paper presents the development and demonstration of large-area 10-kV 4H-SiC DMOSFETs that maintain a classically stable low-leakage normally off subthreshold characteristic when operated at les200degC. This is achieved by an additional growth (epitaxial regrowth) of a thin epitaxial layer on top of already implanted p-well regions in conjunction with a N20-based gate oxidation process. Additionally, the design space of the DMOSFET structure was explored using analytical and numerical modeling together with experimental verification. The resulting 0.15-cm2 active 0.43-cm2 die DMOSFET with 10-kV breakdown provides IDS = 8 A at a gate field of 3 MV/cm, along with a subthreshold current at VGS = 0 V that decreases from 1 muA (6.7 muA/cm2) at 25degC to 0.4 muA (2.7 muA/cm2) at 200degC.

) 54-A (at 780

A normally on 4H-SiC vertical-junction field-effect transistor (VJFET) of 6.8-mm2 active area was manufactured in seven photolithographic levels with no epitaxial regrowth and a single masked ion-implantation event. The VJFET exhibits low leakage currents with very sharp onsets of voltage breakdowns. At a forward gate bias of 2.5 V, the VJFET outputs 24 A (353 A/cm2) at a forward drain-voltage drop of 2 V (706 W/cm2), with a current gain of ID/IG = 21818, and a specific ON-state resistance of 5.7 mOmegaldrcm2. Self-aligned floating guard rings provide edge termination that blocks 2055 V at a gate bias of -37 V and a drain-current density of 0.7 mA/cm2. This blocking voltage corresponds to 94.4% of the VJFETs 11.7-mum/3.46 times 1015-cm3 SiC drift layer limit and is the highest reported blocking-voltage efficiency of any SiC power device under similar drain-current-density conditions.

\hbox{W/cm}^{2}

SiC VJFETs are excellent candidates for reliable high-power/temperature switching as they only use pn junctions in the active device area where the high-electric fields occur. VJFETs do not suffer from forward voltage degradation, exhibit excellent short-circuit performance, and operate at 300°C. 0.19 cm2 1200 V normally-on and 0.15 cm2 low-voltage normally-off VJFETs were fabricated. The 1200-V VJFET outputs 53 A with a forward drain voltage drop of 2V and a specific onstate resistance of 5.4mΩcm2. The low-voltage VJFET outputs 28 A with a forward drain voltage drop of 3.3 V and a specific onstate resistance of 15mΩcm2. The 1200-V SiC VJFET was connected in the cascode configuration with two Si MOSFETs and with a low-voltage SiC VJFET to form normally-off power switches. At a forward drain voltage drop of 2.2V, the SiC/MOSFETs cascode switch outputs 33 A. The all-SiC cascode switch outputs 24 A at a voltage drop of 4.7 V.

) Normally ON 4H-SiC JFET With 0.143-

A new normally-off 4H-silicon carbide (SiC) cascode circuit has been developed capable of offering current densities approaching 500 A/cm/sup 2/. The cascode circuit boasts a specific on-resistance of 3.6 m/spl Omega/cm/sup 2/ and over 1000 V blocking capability. A low-voltage, normally-off SiC JFET is used as the controlling device in series with a high-voltage normally-on SiC JFET capable of blocking over 1000 V. The SiC cascode circuit is shown operable at temperatures exceeding 150/spl deg/C. Silicon carbide cascode circuit switching speeds show comparable speeds to typical Si power MOSFETs in the same voltage range. Clamped inductive load switching measurements are performed to demonstrate the cascodes reverse bias safe operating area (RBSOA) capability. Switching characteristics of the integral power diode are also demonstrated.

\hbox{cm}^{2}

Three large-area 10-kV 4H-SiC DMOSFET designs are compared with respect to their design, die area, breakdown yield, and ON-state yield. The largest of these DMOSFETs had 0.62 cm2 of active area on a 1-cm2 die, with a 10-kV device producing 40 A at a gate field of 3 MV/cm. Two designs used linear interdigitated fingers, whereas the third design used a square cell layout. The linear interdigitated finger design proved to be more robust, with higher yields than the square cell geometry. It was determined that the square cell design was yield limited due to the impact of wafer bow and total thickness variations on photolithographic accuracy, making the square cell geometry less attractive for large-area 4H-SiC DMOSFETs.

Active Area

This work utilizes silicon carbide (SiC) vertical JFETs in a cascode configuration to exploit the inherent advantages of SiC and demonstrate the device under application conditions. The all-SiC cascode circuit is made up of a low-voltage normally-off vertical JFET, and high-voltage normally on vertical JFET to form a normally-off cascode switch. In this work, a half-bridge inverter was developed with SiC cascode switches for DC to AC power conversion. The inverter uses high-side and a low-side cascode switches that are Pulse Width Modulated (PWM) from a 500 V bus to produce a 60 Hz sinusoid at the output. An inductor and a capacitor were used to filter the output, while a load resistor was used to model the steady-state current of a motor.

A 10-kV Large-Area 4H-SiC Power DMOSFET With Stable Subthreshold Behavior Independent of Temperature

Silicon carbide (SiC) is ideally suited for power conditioning applications due to its high saturated drift velocity, its mechanical strength, its excellent thermal conductivity, and its high critical field strength. For power devices, the tenfold increase in critical field strength of SiC allows high voltage blocking layers to be fabricated significantly thinner than those of comparable Si devices. This reduces device on-state resistance and the associated conduction and switching losses, while maintaining the same high voltage blocking capability.

A 2055-V (at 0.7

A 4H-SiC ion implanted VJFET, capable of blocking 1.6 kV with an associated specific-on resistance of 2.1 m cm, has been fabricated (Vbr / Ron,sp = 1.2 GW/cm ). The epitaxial parameters, processing, and guardring design have been optimized for high voltage blocking at low resistance. Selfaligned processing and high resolution lithography enable vertical sidewalls, submicron linewidths and uniform metallization. The VJFET forward current, voltage blocking, and gain characteristics can be tailored by adjusting the design parameters. The VJFETs exhibit a relatively long “short circuit” response of 1.1 ms and can be scaled to increase current output. VJFETs have been connected in the cascode configuration to form +1200 V breakdown, all SiC, normallyoff power switches.

\hbox{mA/cm}^{2}

SiC VJFETs are excellent candidates for reliable high power/temperature switching as they only use PN junctions in the active device area where the high electric fields occur. VJFETs do not suffer from forward voltage degradation, exhibit excellent short circuit performance, and operate at 300degC. 0.19 cm2 1200 V normally-on and 0.15 cm2 low-voltage normally- off VJFETs were fabricated. The 1200 V VJFET outputs 53 A with a forward drain voltage drop of 2 V and a low specific on-state resistance of 5.6 mOmega cm2. The low-voltage VJFET outputs 38 A with a forward drain voltage drop of 3 V and a specific on- state resistance of 10 mOmega cm2. The 1200 V SiC VJFET was connected in the cascode configuration with a Si MOSFET and with a low-voltage SiC VJFET to form normally-off power switches. At a forward drain voltage drop of 2 V, the SiC/MOSFET cascode switch outputs 31 A and the all-SiC cascode switch outputs 19 A.