Eric J. Stewart

A 9-kV Normally- on Vertical-Channel SiC JFET for Unipolar Operation

A normally-on 9-kV (at 0.1-mA/cm² drain leakage) 1.52 × 10^-3-cm² active-area vertical-channel SiC JFET (VJFET) is fabricated with no e-beam lithography, no epitaxial regrowth, and a three-step junction-termination-extension edge termination, which is connected to the gate bus through an ion-implanted sloped extension. The VJFET exhibits low leakage currents and a sharp onset of gate-voltage breakdown occurring at 80 V. To lower resistance, the VJFET is designed to be very normally-on, which minimizes the channel resistance contribution. At a gate bias of 0 V, the VJFETs drain current is 73 mA with a forward drain voltage drop of 5 V (240 W/cm²), a specific on-state resistance of 104 m ¿ · cm², and a current gain of I_D/I_G = 6.4 × 10⁶. Operating at a unipolar gate bias of 2.5 V lowers the on-state resistance to 96 m ¿ · cm² and raises the drain-current output to 79.3 mA, with the current gain being relatively high at I_D/I_G = 2346. Thus, this 9-kV VJFET is capable of efficient power switching operation with high current gain at a low unipolar resistance.

Silicon carbide JFET cascode switch for power conditioning applications

A new normally-off 4H-silicon carbide (SiC) cascode circuit has been developed capable of offering current densities approaching 500 A/cm/sup 2/. The cascode circuit boasts a specific on-resistance of 3.6 m/spl Omega/cm/sup 2/ and over 1000 V blocking capability. A low-voltage, normally-off SiC JFET is used as the controlling device in series with a high-voltage normally-on SiC JFET capable of blocking over 1000 V. The SiC cascode circuit is shown operable at temperatures exceeding 150/spl deg/C. Silicon carbide cascode circuit switching speeds show comparable speeds to typical Si power MOSFETs in the same voltage range. Clamped inductive load switching measurements are performed to demonstrate the cascodes reverse bias safe operating area (RBSOA) capability. Switching characteristics of the integral power diode are also demonstrated.

Investigation of the Suitability of 1200-V Normally-Off Recessed-Implanted-Gate SiC VJFETs for Efficient Power-Switching Applications

A recessed-implanted-gate (RIG) 1290-V normally-off (N-OFF) 4H-SiC vertical-channel JFET (VJFET), fabricated with a single masked ion implantation and no epitaxial regrowth, is evaluated for efficient power conditioning applications. The relationship between the VJFETs on-state resistance and current gain is elucidated. Under high-current-gain operation, which is required for efficient power switching, the 1200-V N-OFF (enhancement mode) VJFET exhibits a prohibitively high on-state resistance. Comparison with 1200-V normally-on VJFETs, fabricated on the same wafer, confirms experimentally that the strong gate-depletion-region overlap required for 1200-V N-OFF blocking is the principal contributor to the prohibitively high specific on-state resistance observed under high-current-gain VJFET operation. Perfecting the 1200-V edge termination structure, which can reduce the theoretical drift specific ON-state resistance from 2.2 to 1.5 mOmega ldr cm2, has a negligible impact in decreasing the channel-dominated 1200-V N-OFF VJFET resistance. The RIG VJFET channel-region optimization simulations (assuming a single commercial implantation and no epitaxial regrowth) revealed that, although aggressively increasing channel doping lowers the resistance, the corresponding reduction in the source mesa width can prohibitively limit manufacturability.

Low Loss, High Performance 1-18 GHz SPDT Based on the Novel Super-Lattice Castellated Field Effect Transistor (SLCFET)

A low loss, high isolation, broadband RF switch has been developed using a novel type of field effect transistor structure that exploits the use of a super-lattice structure in combination with a three dimensional, castellated gate to achieve excellent RF switch performance. Using an AlGaN/GaN super-lattice epitaxial layer, this Super-Lattice Castellated Field Effect Transistor (SLCFET) was used to build 1-18 GHz SPDT RF switches. Measured insertion loss of the SPDT at 10 GHz was -0.4 dB, with -35 dB of isolation and -23 dB of return loss, along with a measured linearity OIP3 value 62 dBm and a P0.1dB of 34 dBm.

The Super-Lattice Castellated Field Effect Transistor (SLCFET): A novel high performance Transistor topology ideal for RF switching

NGES reports the development of a novel transistor structure based on a GaN super-lattice channel with a 3D gate, named the SLCFET (Super-Lattice Castellated Field Effect Transistor). Transistor measurements provided median values of I_MAX>2.7 A/mm, V_PINCH = -8V, with R_ON=0.41 Ω-mm and C_OFF=0.19 pF/mm, for an RF switch FOM of F_CO=2.1 THz.

Demonstration of High-Voltage SiC VJFET Cascode in a Half-Bridge Inverter

This work utilizes silicon carbide (SiC) vertical JFETs in a cascode configuration to exploit the inherent advantages of SiC and demonstrate the device under application conditions. The all-SiC cascode circuit is made up of a low-voltage normally-off vertical JFET, and high-voltage normally on vertical JFET to form a normally-off cascode switch. In this work, a half-bridge inverter was developed with SiC cascode switches for DC to AC power conversion. The inverter uses high-side and a low-side cascode switches that are Pulse Width Modulated (PWM) from a 500 V bus to produce a 60 Hz sinusoid at the output. An inductor and a capacitor were used to filter the output, while a load resistor was used to model the steady-state current of a motor.

Effect of Bipolar Gate-to-Drain Current on the Electrical Properties of Vertical Junction Field Effect Transistors

Electron-hole recombination-induced stacking faults have been shown to degrade the I-V characteristics of SiC power p-n diodes and DMOSFETs with thick drift epitaxial layers. In this paper, we investigate the effect of bipolar gate-to-drain current on vertical-channel JFETs. The devices have n- drift epitaxial layers of 12-μm and 100-μm thicknesses, and were stressed at a fixed gate-to-drain current density of 100 A/cm2 for 500 hrs and 5 hrs, respectively. Significant gate-to-drain and on-state conduction current degradations were observed after stressing the 100-μm drift VJFET. Annealing at 350°C reverses the stress induced degradations. After 500 hours of stressing, the gate-to-source, gate-to-drain, and blocking voltage characteristics of the 12-μm VJFET remain unaffected. However, the on-state drain current was 79% of its pre-stress value. Annealing at 350°C has no impact on the post-stress on-state drain current of the 12-μm VJFET. This leads us to attribute the degradation to a “burn-in” effect.

Exploring the design space of rugged seven lithographic level silicon carbide vertical JFETs for the development of 1200-V, 50-A devices

Silicon carbide (SiC) is ideally suited for power conditioning applications due to its high saturated drift velocity, its mechanical strength, its excellent thermal conductivity, and its high critical field strength. For power devices, the tenfold increase in critical field strength of SiC allows high voltage blocking layers to be fabricated significantly thinner than those of comparable Si devices. This reduces device on-state resistance and the associated conduction and switching losses, while maintaining the same high voltage blocking capability.

2.1 m/spl Omega/-cm2, 1.6 kV 4H-Silicon Carbide VJFET for Power Applications

A 4H-SiC ion implanted VJFET, capable of blocking 1.6 kV with an associated specific-on resistance of 2.1 m cm, has been fabricated (Vbr / Ron,sp = 1.2 GW/cm ). The epitaxial parameters, processing, and guardring design have been optimized for high voltage blocking at low resistance. Selfaligned processing and high resolution lithography enable vertical sidewalls, submicron linewidths and uniform metallization. The VJFET forward current, voltage blocking, and gain characteristics can be tailored by adjusting the design parameters. The VJFETs exhibit a relatively long “short circuit” response of 1.1 ms and can be scaled to increase current output. VJFETs have been connected in the cascode configuration to form +1200 V breakdown, all SiC, normallyoff power switches.

8 kV Normally-off All-SiC Cascode Power Switch Using VJFETs

We demonstrate an 8 kV, 3 A cascode power switch using SiC VJFETs for both the normally-on and normally-off devices. The normally-on SiC VJFETs have blocking voltages greater than 8 kV at VGS =-50 V pinch-off voltage and on-state currents of more than 4 A at VGS=0 V. The normally-off SiC VJFETs block 70 V (VGS=0 V) and can drive >2 A/device with positive gate voltage (VGS=2.5 V). The VJFETs were combined into a module to create the 8 kV all-SiC cascode switch that blocks 8 kV normally-off and drives 3 A of on-state current. Preliminary switching measurements show very fast rise and fall times.