Masao Taguchi

A 256 Mb SDRAM using a register-controlled digital DLL

This 256 Mb synchronous DRAM with 1 ns clock access is stable against temperature, voltage, and process variation by use of an innovative register-controlled delay locked loop (RDLL). Unlike most conventional high-density DRAMs, the bit-lines are placed above the storage capacitors in this DRAM to relax design rules of the core area. The noise issues are analyzed and resolved to help implement the technology in mass production of 0.28 to 0.24 /spl mu/m 200 MHz DRAMs.

A 12.5Gb/s/link non-contact multi drop bus system with impedance-matched transmission line couplers and Dicode partial-response channel transceivers

A reduced-reflection multi-drop bus system using Dicode (1-D) partial response signaling transceiver is presented for the first time in the world. Directional couplers on transmission lines arranged with equi-energy distributing and exact impedance matched conditions allow the bus to reach to 12.5Gbps/link speed. The transmission line has 5-convex portions to form one side of a coupler where the transmission line width is adjusted to control the characteristic impedance of the coupling section, minimizing signal reflection from each section. Dicode partial-response signaling method with a half-rate architecture was used where a precoder is placed in the transmitter to make the signal best fit for the channel to eliminate inter symbol interference (ISI) where the test chip transmitter occupies 3,750 μm2 and the receiver occupies 750 μm2 with 90nm CMOS technology, consuming 40mA and 23mA respectively at the supply voltage of 1.2V.

Analysis and Design of an 8.5-Gb/s/Link Multi-Drop Bus Using Energy-Equipartitioned Transmission Line Couplers

An 8.5-Gb/s/link non-contact multi-drop bus is presented. The signal reflections that limit the data rates of conventional multi-drop bus interfaces are dramatically reduced by using transmission line couplers at each signal branching point. As an energy-equipartitioned technique provides the same signal level to every port, wider receiver margin is achieved. The data rate is improved by 1.8 times compared to the most advanced multi-drop bus interface. The theoretical analysis and design techniques of energy-equipartitioned transmission line couplers are discussed in this paper. The design methodologies were verified through simulations performed by using a full-3D EM-simulator and experiments with FR4 test boards. Due to the low-cut characteristics of the couplers, the low-frequency components are cut off so that differentiated pulses arrive at the receiver input point. A receiver detects and recovers the received pulses by integrating them using hysteresis characteristics. The design techniques of the transceiver for the transmission line couplers are also discussed in this paper. The proposed methods were verified by using a test chip fabricated with a 90-nm CMOS process. Experiments with a prototype of an eight-drop multi-drop bus system confirmed at a data rate of 8.5-Gb/s/link. The measured timing margin at the far-end module was 0.49-UI at a BER of 10-12. The power consumption of the transceiver was 75.6-mW at a supply voltage of 1.2-V.

30.6 An electromagnetic clip connector for in-vehicle LAN to reduce wire harness weight by 30%

Heavier wire harnesses decrease the fuel efficiency of vehicles. The number of wires has increased sharply with presently over one hundred electronic control units (ECUs). Connectors also add to the weight (Fig. 30.6.1(a)). The connectors used in vehicles occupy a considerable space because heavy protection is required against transmission interruption caused by vibration. In addition, a significant number of wires are used together in a junction box to increase total wire length (e.g. 55L when 10 ECUs are connected) and thus weight increases accordingly.

A 0.15mm-thick non-contact connector for MIPI using vertical directional coupler

As silicon chip performance continues to increase, the interconnection capabilities should also be improved to achieve higher overall system performance. This paper proposes a new, small-size and high-speed non-contact interconnect between printed circuit boards (PCBs) using a vertical directional coupler (VDC), which has actually been applied to a liquid crystal display (LCD) driver board. The feasibility of a millimeter-range non-contact interface using a directional coupler was studied previously [1]. In this paper, two signal ports have been implemented in one coupler by best utilizing the characteristics of VDC. The coupler size is 5mm × 2.25mm, and the gap between the couplers is about 75μm, which corresponds to the twofold thickness of a soldering resist on PCB and the adhesive material in between. The transmitter transforms the data sequence from Non-Return-to-Zero (NRZ) into pulses in order to reduce the level of DC components. This achieves a power saving of 1.47pJ/b, and the pulses are sent to the coupler in differential mode to prevent electromagnetic interference (EMI). The measured speed was 4.6Gb/s per coupler to achieve the MIPIs maximum speed of 6Gb/s with two couplers. Conventional connectors have housings to protect contact elements or to provide mechanical support for plug-in and out. However, these housings make it difficult to achieve the smallest possible systems because they require extra space. In addition, they sometimes make the PCB trace longer, which deteriorates the maximum data rate. The method we have developed involves delineating VDC on PCB or a flexible printed circuit (FPC) to connect boards without housings and with the minimum distance. As a result, this interconnect scheme is advantageous not only because it saves space but also because it makes it easier to build systems, even those that contain a large number of built-in connectors. Thus, the proposed non-contact interconnect is suitable for future small-size systems.

A 0.15-mm-Thick Noncontact Connector for MIPI Using a Vertical Directional Coupler

A noncontact and housing-less thin-thick connecting method was developed for mobile industry processor interface (MIPI) applications. This paper describes the worlds first 0.15-mm-thick connector using a vertical directional coupler (VDC) which enables simultaneous two-link communication with one coupler without fatal performance degradation. We have analyzed the conditions for isolating two links in a coupler, and the design method is discussed. A fully balanced pulse transmitter implemented in 90-nm CMOS technology significantly suppressed electromagnetic interference (EMI), which agrees well with MIPI requirements. An experimental liquid crystal display interface system reached a maximum data rate of 2.3 Gb/s/link at a bit error rate of less than 10-12 and a power consumption of 1.47 pJ/b. The timing margin of single link was 320 ps ( =64% U.I.) and of two links was 305 ps ( =61% U.I.) at 2.0 Gb/s.

A 12.5Gb/s/link non-contact multi drop bus system with impedance-matched Transmission Line Couplers and Dicode partial-response channel transceivers

A reduced-reflection multi-drop bus system using Dicode (1-D) partial response signaling transceiver is presented for the first time in the world. Directional couplers on transmission lines arranged with equi-energy distributing and exact impedance matched conditions allow the bus to reach to 12.5Gbps/link speed, which is the worlds fastest data link speed with multi-drop bus architecture. Dicode partial-response signaling method with a half-rate architecture was used where a precoder is placed in the transmitter to make the signal best fit for the channel to eliminate inter symbol interference (ISI).

An EMI-less full-bridge inverter for high speed SiC switching devices

To improve the efficiency of inverters used in hybrid cars and electric vehicles (EVs), SiC-MOSFET transistors are used to minimize the switching losses by high-speed switching. However, as the speed increases, surges and ringing occur in the output voltage, and these can cause electromagnetic interference (EMI). In this paper, we study how this issue can be addressed by using a full bridge inverter to suppress common-mode voltages and cancel ringings currents with opposite phase that are generated when driving at high speed. In most cases, one should assume that transistors that are driven simultaneously have slightly different I-V characteristics. Due to this variation, the ringing cannot be completely canceled, resulting in a common-mode voltage. Although this is liable to cause EMI, we also found that if the two transistors are operated close to the point where the maximum switching current occurs, the common-mode voltage fluctuation can be sufficiently suppressed at any current. We analyzed these characteristics in a simulation using a SiC-MOSFET transistor model, and experimentally verified its behavior in a prototype inverter.

A 280 Mb/s In-Vehicle LAN System Using Electromagnetic Clip Connector and High-EMC Transceiver

A 280 Mb/s non-contact in-vehicle LAN system using electromagnetic clip connectors is presented. The bidirectional transmission line coupler based electromagnetic clip connector, which can be used to make local area network connections similar to clips, suppresses the signal reflections on the bus enabling 280 Mb/s data rate which is 7 times faster than the state-of-the-art in-vehicle LAN transceiver. Since all modules are connected with the shortest distance, this connection system can reduce wire harness weight by 30%. Forward error correction is done by N-x Manchester encoding on the transmitter side and majority voting on the receiver side. High noise immunity is achieved through synchronous receiving by the digital clock recovery circuit which is robust against noise. Communication tests were conducted at 280 Mb/s with 10 transceivers fabricated in 65 nm CMOS technology connected by a 10 m unshielded twisted pair cable. Evaluation of the bit error rate and radiation spectrum confirmed that the ISO specifications concerning electromagnetic susceptibility and the CISPR ones concerning electromagnetic interference are satisfied.

A 6nW inductive-coupling wake-up transceiver for reducing standby power of non-contact memory card by 500×

Memory cards are widely used in electronic systems to expand internal storage area or are used as detachable media to carry data. Although cloud computing has recently drawn attention, data transfer consumes significant power (e.g., 1% battery charge of a smartphone when 10 pictures are transferred through WLAN), making local memory card storage still attractive in mobile devices. As storage capacity increases, the I/O speed should also increase accordingly. However, conventional memory cards require strong ESD protection, limiting high-speed data transfer. A non-contact memory card [1] is one of the solutions to this problem. No signal terminals are exposed for mechanical contact, which relaxes ESD constraints. A data transfer rate of 6Gb/s/ch by inductive coupling [1] and 12Gb/s/ch by transmission-line coupling [2] are reported. The post-UHS-II speed over 5Gb/s can be covered with around 10mW power consumption. Moreover, by supplying power wirelessly, mechanical connections can be completely removed, which could provide features such as waterproof capability or a new attach-remove user interface. A >50% high-efficient wireless power delivery has been reported [3]. However, it mainly supplies a large amount of active power, and the efficiency drops to ~10% in low-power standby mode. Shutting down the power delivery in standby would require a power-on sequence and an unacceptably long suspend (~10s) for each new command. For high-speed card access, the power delivery and the wireless data receiver (RX) should always be active, consuming about 2mW in RX and in total 20mW including loss in the wireless power delivery. This standby power is almost identical to that of typical smartphones, tablet-PCs, or camcorders and the battery life halves.