Takamasa Takano

A Characterized Redistribution Layer Architecture for Advanced Packaging Technologies

An enhanced redistribution layer architecture has been developed in which the Cu wires are directly covered with a double layer consisting of two types of dielectrics by using a semi-additive process. The double layer enhanced the thermal and electrical reliabilities of the Cu wires. Moreover, it enabled fabrication of a single-sided nine-level redistribution layer embedded with a fully stacked via. This greatly increased wiring layout flexibility and enhanced the transmission rate. Characterization of this architecture revealed that it has several advantages for advanced packaging technologies including a 2.5D interposer.

Electrical Simulation Design Technology of Silicon Through Substrate

As electronic product becomes smaller and lighter with an increasing number of function, the demand for high density and high integration becomes stronger. In other aspect, IT (information technology) products supported on broadband network communication technologies. It changes from the cable communication by the digital circuit to the wire less communication by analogue and mixed-signal technologies. We have researched requirements for the design of next generation system in packaging module from the several points of view which include line width, pad pitch, clock, frequency, interconnection delay and number of passive components. Based on this, we presented a new concept packaging module model. The new module, silicon through integration platform, has through interconnection via, fine wiring build up layers, and embedded passives. This paper reports the result, which focus on the various electrical characteristics of silicon through substrate, and electrical simulation design technology for system in package. We have tried very accurate impedance matching design using 2D electromagnetic simulation and TDR (Time Domain Refrectometry) measurement technology. To investigate high frequency characteristic of hi-speed transmission line and silicon through interconnection, we have tried 3D electromagnetic simulation and VNA (vector network analyser) measurement. Thus, we have obtained good performance of high frequency transmission line and optimal design rule for system in package.© 2005 ASME