Takashi Iizumi

Metrology of LER: influence of line-edge roughness (LER) on transistor performance

The influence of line-edge roughness (LER) on transistor performance was investigated experimentally and the preciously proposed guideline for CD and LER measurements was examined. First, regarding the transistor-performance measurements, a shift of roll-off curves caused by LER within a gate pattern was observed. Moreover, the effect of transistor-width fluctuation originating from long-period LER was found to cause a variation in transistor performance. Second, regarding LER and CD metrology, the previously reported guideline was validated by using KrF and ArF resist-pattern samples. It was found that both CD and LER should be evaluated with the 2-μm-long inspection area. Based on this guideline, a comprehensive approach for evaluating LER and CD for transistor fabrication process is presented. The authors consider that this procedure can provide useful information for the 65-nm-node technology and beyond.

Characterization of line-edge roughness in resist patterns and estimations of its effect on device performance

A guideline for evaluating LER and total procedure to estimate effects of measured LER on device performance were proposed. Spatial-frequency distributions of LER in various resist materials were investigated and general characteristics of spatial-frequency distribution of LER were obtained. Measurement parameters for accurate LER measurement can be calculated according to the guideline. Measured line-width distribution was used for predicting degradation and variation in MOS transistor performance using the 2D device simulation. Effect of long-period component of LER was clarified as well as short-period component.

Bias-free measurement of LER/LWR with low damage by CD-SEM

We propose a new method for the evaluation of line-edge or linewidth roughness (LER/LWR). Conventional, directly measured LER/LWR values always contain a random noise contribution, which is called LER/LWR bias. Our method can separate this bias artifact from the true LER/LWR by using a single image of the sample pattern. The idea is based on the dependency of a measured LER/LWR value on the image-processing parameter for noise reduction. Both, the conventional and the new bias-free LER were calculated on series of images with different frame integration numbers but a fixed field of view. In addition, the validity of this method to the gate-LWR measurement on an ArF resist line pattern was examined. The LER/LWR obtained by our method was independent of the frame number, and agreed with the conventional LER/LWR as measured on an image with a sufficiently large frame-number. That is, our method can evaluate LER/LWR without random-noise contribution, suggesting that the method can be applied to images recorded under low-sample-damage conditions (i.e., low signal-to-noise ratio). It is concluded that the proposed bias-free LER/LWR measurement method will be a powerful tool in lithography metrology especially for achieving practical and accurate LER/LWR measurement with low sample damage.

Characterization of Line-Edge Roughness in Cu/Low-k Interconnect Pattern

To establish a method of measuring interconnect line-edge roughness (LER), low-k line patterns were observed and electric field concentration was simulated on the basis of observation results. Wedge-shaped LERs were observed at the edges of low-k lines, and the bottom and the top widths of the average wedge feature were 60 and 7 nm (or smaller), respectively. Simulation showed that LER causes serious electric field concentration, which may cause the degradation of time-dependent dielectric breakdown (TDDB) lifetime at 100-nm-pitch Cu/low-k interconnects. The maximum electric field strength depends on the conventional LER metric 3Rq, but depends more strongly on the wedge angle, the curvature of the tip. That is, other metrics such as wedge angle can predict fatal electric field concentration caused by LER than the conventional metric 3Rq.

A Discussion on How to Define the Tolerance for Line-Edge or Linewidth Roughness and Its Measurement Methodology

A metrological definition and a target value for linewidth roughness (LWR) in a gate pattern of MOSFETs are proposed. The effects of sampling interval gate-LWR measurements by critical-dimension scanning electron microscopy on measurement accuracy were examined by both experiment and simulation. It was found that a 10-nm interval is sufficiently small to fully characterize roughness in a typically chosen 2-mum-long line. Random image noise and intrinsic LWR variations are found to have larger effects on the measured LWR value than the finiteness of the sampling interval. A practical procedure for improving the measurement accuracy is also devised. Moreover, a methodology for establishing the gate-LWR target is proposed. Threshold-voltage shift caused by gate-LWR is determined from the LWR spectrum and the I-V curves of a transistor without LWR (i.e., ideal I-V curves).

Characterization of line-edge roughness in Cu/low-k interconnect pattern

To establish a method for measuring interconnect line-edge roughness (LER), low-k line patterns were observed and electric-field concentration was simulated based on the observation results. Wedges were observed on the edges, and the bottom and the top widths of the average wedge feature were 60 nm and 7 nm (or smaller), respectively. Simulation showed that the LER causes serious degradation of TDDB immunity at 100-nm-pitch Cu/low-k interconnects. The maximum electric-field intensity depends upon the conventional LER metric, 3Rq, but depends more strongly on the wedge angle, the curvature of the tip, and the minimum linewidth.

The development of security system and visual service support software for on-line diagnostics

Hitachis CD-SEM achieves the highest tool availability in the industry. However, efforts to further our performance are continuously underway. The proposed on-line diagnostics system can allow senior technical staff to monitor and investigate tool status by connecting the equipment supplier and the device manufacturer sites through the Internet. The advanced security system ensures confidentiality by firewalls, digital certification, and advanced encryption algorithms to protect device manufacturer data from unauthorized access. Service support software, called DDS (defective part diagnosis support system), will analyze the status of mechanical, evacuation, and optical systems. Its advanced overlay function on a timing chart identifies failed components in the tool and allows on-site or remote personnel to predict potential failures prior to their occurrence. Examples of application shows that the proposed system is expected to reduce repair time, improve availability and lower cost of ownership.

Impact of long-period line-edge roughness (LER) on accuracy in CD measurement

The influence of long-period line-edge roughness (LER) on measured critical-dimension (CD) values is identified, and a guideline for LER-impact-free CD measurement is introduced. There are two kinds of meanings of CD, one is the average pattern-size calculated in a limited area (i.e., local CD), and the other is the representative pattern-size (average CD). The width of a line pattern measured by CD-SEM is a local CD, which deviates from the average CD because of long-period LER. This LER impact on the CD measurement is investigated in two typical measurements of CD-SEM, evaluation of across-wafer CD-variation and dynamic repeatability of the equipment. It is shown that both results strongly depend upon the height of the inspection area along the line-edge (L) because of long-period LER. It is found that a large L can reduce the LER-impact, and a 2-μm inspection-area or more is recommended for CD measurements. Furthermore, the validity and limitation of the patchwork method, in which several inspection areas are connected to obtain one large area, is examined.

Zero-shrink dimension evaluated for ArF-resist patterns measured by CD-SEM

Resist patterns for ArF-laser lithography slim by electron radiation in Critical Dimension-Scanning Electron Microscope (CD-SEM). To estimate initial CD that includes no LWS, the CD at 0th measurement was extrapolated from shrink-curve that indicates the slimming. Invisible slimming, occurring between the 0th and 1st measurement, was estimated. We made software for CD-SEM to calculate the 0th-CD. Estimation error in the extrapolated 0th-CD was estimated less than 0.9 nm, and the overall slimming including the invisible shrink was 0.3 nm in line-shaped patterns.

Evaluation of line and hole measurement by high-resolution/low-magnification CD SEM

ArF-resist-shrinkage and line-edge roughness-induced CD errors are the two main challenges for CD SEM. The requirement of measurement precision for the 65-nm node is less than 0.5 nm. The current CD SEM ADI precision is between 0.7 to 0.9 nm after shrinkage curve correction. Optical CD (OCD) has provided three major advantages. That is more sampling (> 2500:1), insensitivity to line edge roughness, and less resist damage. These advantages facilitate much better measurement precision (< 0.3 nm) than CD SEM and make OCD a potential APC metrology candidate. However, the recipe and library generation of OCD is more complicated and time consuming than CD SEM. Any thin-film variation will disturb the CD accuracy and recipe coverage range of OCD. For different pitches and film combinations, new OCD libraries need to be generated. Matching through all pitches between CD SEM and OCD is also very difficult. We propose a new concept on optical-CD-like CD SEM measurement, i.e. average line width (ALW) and contact hole diameter (ACD) measurement at high resolution and low magnification (HRLM) CD SEM. The resolution chosen is below 2nm and the magnification is 50KX. The low magnification CD measurement can average the e-beam dosage and reduce the ArF shrinkage. Several repeated patterns such as line/space and hole arrays are measured to get an averaged CD under lower magnification condition. These low magnification average CDs increase the sampling size and they are insensitive to the line edge roughness. The CD linearity of ALW/ACD and the CD matching to current CD SEM methodology will be presented. Small step FEM CD by low magnification and high magnification CD measurement will be studied. The difference between low/high magnification SEM and optical CD will be also studied.