Takayuki Miyazaki

An RF MEMS Variable Capacitor with Intelligent Bipolar Actuation

We propose an IBA scheme based on a pull-out detection, which is suitable for implementing in a circuit. The scheme is implemented in a driver IC that is part of a module with an RF MEMS variable capacitor. No failures are observed over 108 cycles at 85degC, which is an accelerated charging condition.

A 65nm low-power embedded DRAM with extended data-retention sleep mode

An extended data retention (EDR) sleep mode with ECC and MT-CMOS is proposed for embedded DRAM power reduction. In sleep mode, the retention time improves by 8 times and the leakage current is reduced to 13% of the normal operation mode. Since ECC scrubbing operates only in the EDR sleep mode, read/write performance is not degraded. A 65nm low-power embedded DRAM macro featuring 400MHz operation and 0.39mW of data-retention power is realized

An 833MHz Pseudo-Two-Port Embedded DRAM for Graphics Applications

Embedded DRAMs have superior features for applications that require very high memory bandwidth, such as graphics and multimedia. To achieve high memory bandwidth, various techniques such as widening input/output pins shrinking the unit array size, and performing a read operation and a write operation concurrently have been reported. However, these embedded DRAM macros incur considerable area penalty to obtain high memory bandwidth. Among the techniques for achieving high bandwidth, the concurrent read/write operation is a very effective method in performing a read-modify-write function and a double-buffer function for the graphics applications. A pseudo-two-port embedded DRAM macro that performs concurrent read/write operations at high frequency without sacrificing cell efficiency is reported in this paper. To accomplish this, a read/write cross-point switch circuit (RWCC) and distributed steering redundancy switches (DSRS) are introduced. A 32 Mb macro is characterized via a test-chip fabricated in a 65 nm embedded DRAM process.

A 600 mA, constant on-time controlled DC-DC converter with 67% conversion efficiency at an output current of 23 μA

This paper describes a constant on-time controlled DC-DC converter that realizes both high efficiency under light loads and fast load transient response. To realize low-power operation, a combination of a simple common-source amplifier and a low-power differential amplifier is used instead of a differential comparator. Using a common-source amplifier cuts power consumption in half compared with using a conventional differential comparator. The power consumption of the differential amplifier is negligible because it determines the DC operating point only. The differential amplifier also improves the accuracy of the DC output voltage. In addition, background calibration by a zero-cross comparator is proposed; calibration guarantees correct discontinuous-conduction mode operation and minimizes power loss at switching. Experimental results for a 600 mA, 3.6 V to 1.2 V DC-DC converter are described. The measured efficiency is 67% at an output current of 23 μA, and more than 80% for output current over 100 μA to 600 mA. Also, a small voltage disturbance of 30 mV is attained at a load-current transient of 590 mA.

Low power embedded DRAM using 0.6V super retention mode with word line data mirroring

An 88% reduction of refresh power of the 65nm embedded DRAM is achieved using Super Retention Mode (SRM) with Word Line Data Mirroring(WLDM). The retention time in Super Retention Mode is measured in the range of 0.55V to 1.2V. The minimum refresh power is obtained at 0.6V. The retention time of Super Retention Mode at 0.6V is extended by 4.1 times from that of conventional single cell operation at 1.2V. The transition time from normal mode to Super Retention Mode of 22.6μs is achieved with only 0.4% area penalty.

Constant on-time DC-DC converter using ripple injection filter with inherent adaptive voltage positioning

A constant on-time DC-DC converter using ripple injection filter with inherent adaptive voltage positing function is proposed. By using the proposed filter, voltage positioning is realized without current-sensing mechanism and the droop voltage can be controlled by a resistor within the filter. The droop voltage is calculated and the filter design methodology to obtain optimal transient response is described. A test chip for 1-A, 3.6-V to 1.2-V DC-DC converter is fabricated using 0.25-μm CMOS process. The experimental results show that the line regulation of the designed DC-DC converter is 37mV/A which matches the calculation. With a load-current transient of 500mA, the designed DC-DC converter showed voltage disturbance of 15mV.

All-digital single-inductor multiple-output DC-DC converter with over 65.3% efficiency in 1 uW to 50 mW load range and 86.3% peak efficiency

This paper presents a wide load range all-digital single-inductor multiple-output (SIMO) DC-DC buck converter. Since sensor nodes for the Internet of Things (IoT) operate mostly in a standby mode and occasionally in an active mode, a SIMO DC-DC converter supporting a wide load range with practical conversion efficiency is required. In order to achieve practical efficiency in a wide load range, three new techniques of a maximum-on-time control, a channel-consolidated-multiple-switching and a logic-gate-based zero-current-detection circuit are proposed. The proposed SIMO DC-DC converter achieves 86.3% peak efficiency and the wide load range from 1 uW to 50 mW with over 65.3% efficiency. This is the first SIMO DC-DC converter with over 60% efficiency in such a wide load range.

20 mV input, 4.2 V output boost converter with methodology of maximum output power for thermoelectric energy harvesting

This paper presents a low-input-voltage boost converter for thermoelectric energy harvesting. In environments with 1-2 K thermal difference, such as in the case of a body-wearable application, TEG generates several micro watts and tens of mV to the boost converter. For the low-input-voltage operation, the power consumption of the control circuit of the proposed boost converter is reduced by using a duty-cycle bandgap reference voltage circuit. In order to maximizing the output power, the input voltage of the boost converter is conventionally set to half of an open voltage of a thermoelectric generator (TEG). In this setting, however, conduction losses such as those of an inductor and a power switch are not considered. The conventional boost converter cannot output the maximum output power. We propose a methodology of the maximum output power considering the conduction losses in the boost converter. The boost converter was implemented in a 0.13 μm CMOS process. The output voltage can be boosted from 20 mV input which is the open voltage of TEG of 1.5 Ω source resistance. The measurement results show that the output power is increased by approximately 10% using the proposed methodology for the open voltage between 20 mV and 100 mV.

DC-DC conversion techniques for low-voltage power supplies

This paper describes two DC-DC conversion techniques suitable for low-voltage mobile applications. Converters using the first technique realize high efficiency under light-load conditions by having an architecture with a simple common-source amplifier and a low-power differential amplifier. The measured efficiency of the first type of converter is 67% at an output current of 23 μA. A one-shot technique in the second type of converter reduces output-voltage fluctuation. A predetermined current is injected into the output capacitor when a load transient is detected by observing the capacitor current. This technique reduces overshoot voltage by 68% at a high-to-low load transient.