Taro Yamamoto

Feasibility of immersion lithography

Feasibility of ArF (193nm) immersion lithography is reported based on our recent experimental and theoretical studies. Local fill method of water, edge shot, high NA projection optics, focus sensing, water supply, polarization effect, polarized illumination and resist are investigated. Although we recognize there are some remaining engineering risks, we have judged that ArF immersion lithography is basically feasible and is a very promising method that can reach the half pitch required for the 45nm node. On this basis we have planned our development schedule of immersion exposure tools.

Improvement of CD controllability in developer process

With recent improvements in design rule, requirements for CD (Critical Dimension) control have been increasing. Development is one of the critical processes affecting CD control. As a track supplier, we have focused attention on the stage of TMAH puddle formation and investigated various development systems. The behavior of resist dissolution is different between the early stage (when forming the puddle) and the later stages of the develop process (static development). It is already reported that proper control is necessary for the late stage in order to improve the CD control. The most noteworthy phenomenon in the late stage is that the dissolved resist (a develop process by-product) diffuses into the TMAH puddle. During this stage, the by-product and the TMAH are partially mixed in the puddle and cause CD variance within a wafer. Moreover, the amount of by-product on the pattern periphery significantly influences this phenomenon. It’s assumed that the by-product’s behavior contributes to CD fluctuation within a shot. We attempted to lower the concentration of resist by-product in the later stages of the develop process and confirmed some improvements in CD control. This report summarizes the new process and its effectiveness.

Application technology of stacked film with highly controlled edge structure

On the device manufacturing, the film edge control around the wafer edge has been critical at the point of edge control of deposited film. So far, the film edge control is operated by the wafer edge exposure system and/or the edge beam remover. The immersion lithography which is applied to the device generation below 65 nm node requires more additional and severe items for film edge control. These typical requirements are position control of coating film and wafer bevel cleanness. For examples, top coat film is widely applied to the immersion lithography. But this topcoat film is easily peeled off, if top coat film edge should be directly located on the wafer substrate like Si wafer. Thus, the edge position of topcoat film must be controlled very carefully. And the particle or residues on the wafer bevel is thought to be one of the causes to generate immersion defect. Wafer bevel must be clean in order to reduce the immersion defect. Then we have developed novel application technology in order to solve these kinds of immersion defectivities. This new application technology is based on rinse solution technology and new hardware concept. This new application technology can control the edge position of coating film with high accuracy and can reduce the particle and residues. We show the edge position accuracy using our application technology and furthermore, the stability of edge position accuracy in case of multi-layered resist process. We also show the cleanness of the wafer bevel area at the same time. And we can achieve the immersion process with wide process latitude with innovative application technology.

Wafer management between coat/developer track and immersion lithography tool

The ArF immersion lithography is a probable technique for the application below 65 nm hp generation. The first immersion lithography scanner, the engineering evaluation tool (EET) being connected inline with a coat/developer (C/D) ACT12 (Tokyo Electron Ltd.), was completed in the end of 2004 and showed that a bit of residual water might make a watermark on the wafer. Tokyo Electron Ltd. and Nikon Corp. have challenged to resolve this problem from a point of view of improvements on the system components for production tools. Nikon improves on local water filling nozzle, wafer table and wafer loader. The nozzle and the wafer table in the exposure tool are optimized to diminish the residual water, while the wafer stage is driven at high speed for high throughput of the production tool. However a bit of water, the amount of which also depends on a topcoat material, may remain. The wafer loader should carry the wafer to the C/D before drying up it. Before post exposure bake (PEB), C/D rinses and dries the wafer immediately to prevent it from the generation of watermark by remaining water. The wafer handling condition including rinse of which is optimized using the ACT12 connected to the EET and have applied to the new C/D LITHIUSi+ connected to S609B, the first Nikons immersion scanner for mass production. In this report, we present the latest immersion technology, including the wafer contamination control, which is developed through the collaboration between Tokyo Electron Ltd. and Nikon Corp.