Thirumal Thanigaivelan

Physical understanding of cryogenic implant benefits for electrical junction stability

We investigate the effect of cryogenic temperature implants on electrical junction stability for ultra shallow junction applications for sub-32 nm technology nodes and beyond. A comprehensive study was conducted to gain physical understanding of the impact of cryogenic temperature implants on dopant-defect interactions. Carborane (C2B10H12) molecule, a potential alternative to monomer boron was implanted in carbon preamorphized silicon substrates at cryogenic implant temperatures. Results indicate implants at cryogenic temperatures increase dopant activation with reduced diffusion, resulting in lower sheet resistance for a lower junction depth. Further, this study emphasizes the benefits of co-implants performed at cryogenic temperatures as alternative to traditional preamorphizing implants.

Contact Resistance Reduction for Strained N-MOSFETs With Silicon-Carbon Source/Drain Utilizing Aluminum Ion Implant and Aluminum Profile Engineering

We demonstrate a novel technique to reduce the nickel silicide (NiSi) contact resistance Rcon in strained n-channel MOSFETs (n-FETs) with silicon carbon (Si:C) stressors, where a presilicide aluminum (Al) implant is performed and the Al profile is found to be affected by carbon (C). Al diffusion during silicidation is retarded by the presence of C and a high Al concentration is retained within the NiSi:C film, which is considered to be the main reason for electron barrier height ΦBn reduction in NiSi:C contacts. Ge preamorphization implant prior to Al implant further reduces the ΦBn to 0.44 eV. Integration of this technique in n-FETs with Si:C stressors achieves a 50% reduction in source/drain series resistance and 12% enhancement in saturation drive current. Negligible impact on the device short-channel effects is observed. When Al segregates at the NiSi/Si interface, the hole barrier height ΦBp is lowered, and such an Al profile can be used for the p-FETs. Al profile engineering shows a promise as a single-metal-silicide solution for selective Rcon optimization in CMOS.

Schottky barrier height tuning of silicides on p-type Si (100) by aluminum implantation and pulsed excimer laser anneal

We investigate the tuning of Schottky barrier height (SBH) of nickel silicide formed by pulsed excimer laser anneal of nickel on silicon implanted with aluminum (Al). A wide range of laser fluence was investigated, and it has been found that laser fluence influences the distribution of Al within the silicide and at the silicide/silicon interface. This in turn affects the effective whole SBH (ΦBp) at the silicide/silicon junction. High Al concentration at the silicide/silicon interface and high temperature for nano-second duration to achieve Al activation while keeping the Al concentration within the silicide low is vital for achieving low ΦBp. We demonstrate the achievement of one of the lowest reported ΦBp of ∼0.11 eV. This introduces a new option for forming nickel silicide contacts with reduced contact resistance at low thermal budget for possible adoption in future metal-oxide-semiconductor transistor technologies.

Benefits of Damage Engineering for PMOS Junction Stability

As CMOS devices continue to shrink, the formation of ultra shallow junction (USJ) in the source/drain extension remains to be a key challenge requiring high dopant activation, shallow dopant profile and abrupt junctions. The next generations of sub nano‐CMOS devices impose a new set of challenges such as elimination of residual defects resulting in higher leakage, difficulty to control lateral diffusion, junction stability post anneal and junction formation in new materials. To address these challenges for advanced technological nodes beyond 32 nm, it is imperative to explore novel species and techniques. Molecular species such as Carborane (C2B10H12), a novel doping species and a promising alternative to monomer Boron is of considerable interest due to the performance boost for 22 nm low power and high performance devices. Also, to reduce residual defects, damage engineering methodologies have generated a lot of attention as it has demonstrated significant benefits in device performance. Varian proprieta...

Integration Benefits of Carborane Molecular Implant for State-of-the-Art 28-nm Logic pFET Device Manufacturing

In this letter, for the first time, the integration benefits of a molecular carborane (CBH-C2B10H12) implant on a state-of-the-art 28-nm logic flow are demonstrated and discussed via advanced modeling. It is shown that, by integrating CBH, pLDD formation can be optimized to provide device benefits via profile/damage engineering.

Impact of a Germanium and Carbon Preamorphization Implant on the Electrical Characteristics of NiSi/Si Contacts With a Presilicide Sulfur Implant

This letter reports the demonstration of preamorphization implant (PAI) using germanium (Ge) and carbon (C) and its combination with presilicide sulfur (S) implant for Schottky barrier height (SBH) tuning of nickel silicide (NiSi)-silicon contacts. Ge and C PAI increases the threshold temperature for agglomeration of a NiSi film, thus enhancing its thermal stability. A presilicide S implant and its segregation at metal/semiconductor interface effectively lowers the effective electron SBH ΦBn to 0.18 eV. In addition, the distribution of reverse current in the NiSi/n-type Si contact is improved with the introduction of Ge and C PAI.

Novel technique to engineer aluminum profile at nickel-silicide/Silicon:Carbon interface for contact resistance reduction, and integration in strained N-MOSFETs with silicon-carbon stressors

We report a new technique of achieving reduced nickel silicide contact resistance in strained n-FETs, where a pre-silicide Aluminum (Al) implant was introduced, and the Al profile was controlled/engineered by Carbon (C). C suppresses Al diffusion during silicidation, hence retaining high concentration of Al within the NiSi. Incorporating Al within NiSi reduces the Schottky barrier height for n-Si:C contact, leading to 18 % IOn improvement for Si:C S/D nFETs with no compromise on short channel effects.

VIISta 900 3D: Advanced medium current implanter

The continued advance of semiconductor technology, including the emergence of 3D device architectures, demands ever-increasing precision of dose and angle control in ion implantation. The Varian Semiconductor Equipment business unit of Applied Materials has enhanced the design of the industrys leading medium current implanter to meet the production requirements of advanced technology nodes. Improvements to the implanter architecture include more precise angle control, increased beam utilization, better uniformity and repeatability and longer maintenance intervals. Advanced ion optics allow measurement and control of beam shape.

Precision ion implantation: A critical tool for advanced device processing

The scaling requirements of device technologies beyond 100 nm can only be satisfied by careful thermal process and defect engineering. We will demonstrate the need for precision ion implantation by focusing on three areas: (1) Junction Formation: Thermal processes trend to ultimately diffusion-less anneals such as laser or flash annealing. As a consequence, the final dopant distribution is more and more dominated by the as-implanted one, which makes implant angle precision imperative. Using TCAD simulations we analyze implant precision requirements for 32 nm half-pitch high-performance logic. A Pareto chart of process variables and their impact on transistor Idsat is developed. (2) Well Formation: Changing the implant angles during well formation to 0° results in improved STI isolation or alternatively in significant die-size reduction. Additionally, channeling implants produce less defects in the surface region leading to a reduction in leakage. Using TCAD simulations of a 80 nm DRAM technology we analyze both aspects quantitatively. (3) Elimination of Residual Damage After Diffusion-Less Anneal: We present results of two techniques designed to eliminate residual damage without the need for a post-anneal thermal process step. Both methods rely on supplementing and/or enhancing amorphization during implantation.

Benefits of Zero Degree Single Wafer High Energy Implants for Advanced Semiconductor Device Fabrication

High energy well implants for retrograde well formation are usually tilted to avoid channeling. However, this can cause the well profile under the STI (Shallow Trench Isolation) to be skewed or asymmetric due to shadowing by the resist. This results in poor inter‐well isolation and increased leakage currents. This problem becomes more pronounced below 65 nm design rules. In this paper, using experimental data and TCAD simulations we demonstrate the improvement in inter‐well isolation and junction characteristics that can be achieved with true‐zero well implants. Finally, we briefly discuss the corresponding die shrinkage that can be expected.