Thomas Hornak

A 1.5 Gb/s link interface chipset for computer data transmission

The authors designed a set of four ICs to provide encoding, multiplexing, clock extraction/demultiplexing, and decoding for gigabit-rate serial data transmission. These chips form a high bandwidth data link for point-to-point communication. A new line code is implemented that provides DC balance, efficient encoding, framing, and simple clock extraction. Embedded in the code is a fixed transition used by the phase/frequency locked loop (PLL) for simple clock extraction and frame synchronization. Unlike other links, this PLL requires no trimming for data retiming, either in production or later. An on-chip voltage-controlled oscillator (VCO) with a tuning range of 1.1-1.6 GHz is available for use with the PLL. With this chip set the authors demonstrated a transmission rate of 16 bits in parallel at 75 MHz or, with encoding overhead, a serial rate of 1.5 Gb/s. >

A High-Resolution Error Plotter for Analog-to-Digital Converters

This paper describes an automatic error plotting system for analog-to-digital converters (ADCs) which measures the static errors of the device under test at every quantization band edge (QBE) and displays them in graphical form. A quantization band edge is defined as any ADC input voltage which produces two adjacent output codes, each with 50-percent probability. The error of the ADC is then defined as the difference between the actual and nominal values of a QBE. A feedback loop which seeks each QBE is central to the system. Sample plots show the ability of the system to display common types of ADC errors and to display error signatures that often point to specific ADC problems. Resolution, accuracy, and (to a large extent) speed of the system depend on the digital voltmeter chosen as a standard. In a typical case, a 2000 point plot can be made in two minutes with a resolution and accuracy exceeding the weight of the ADCs least significant bit by an order of magnitude.

A high precision component-tolerant A/D convertor

A pulse transformer is used to double and sum voltages in an A/D encoder that is based on the recursive algorithm V/SUB i+1/=V/SUB REF/-s|V/SUB i/|. As a result of isolating the transformer from the input signal d.c. component, independence of circuit zero drift is achieved. Resistor and V/SUB BE/ mismatch do not affect the encoder accuracy. Automatic zero and gain correction are employed to provide stable adjustment-free operation. A custom analog processor chip carrying both MOS and bipolar transistors was fabricated to implement the algorithm. The 12-bit resolution with a maximum encoder error of 250 /spl mu/V in a temperature range from 0-70/spl deg/C was achieved at 20-kHz sampling rate.